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Implement Galileo E1B I/NAV navigation decoding

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onur
2026-07-31 00:15:34 +03:00
parent 2a6ccfc23d
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docs/development_phases.md
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@@ -48,3 +48,20 @@ python -m galileo_rx.cli track --config configs/tracking_example.yaml --input sa
python -m galileo_rx.cli run --config configs/acquisition_example.yaml --input samples.bin
python -m galileo_rx.cli compare-fixed --config configs/acquisition_example.yaml --input samples.bin
```
## E1B I/NAV pre-PVT gate
```bash
python tools/generate_signalsim_vectors.py --signalsim-path signalsim/SignalSim --vector navigation_multisat --project-root .
python -m galileo_rx.cli collect-navigation --config configs/navigation_collection.yaml --output-dir reports/navigation_run --require-ready
python -m galileo_rx.cli prompts-to-symbols --input verification/navigation/signalsim_navigation_multisat/prn_01/prompt_epochs.npz --prn 1 --output-dir reports/navigation_replay/prn_01
python -m galileo_rx.cli decode-inav --input verification/navigation/signalsim_navigation_multisat/prn_01/prompt_epochs.npz --prn 1 --output-dir reports/navigation_replay/prn_01
python -m galileo_rx.cli inspect-navigation --input reports/navigation_replay/prn_01
python -m galileo_rx.cli compare-inav-truth --artifact-root verification/navigation/signalsim_navigation_multisat --rinex signalsim/SignalSim/EphData/BRDC00IGS_R_20211700000_01D_MN.rnx --collection-report reports/navigation_run/inav_collection_report.json --signalsim-config verification/vectors/signalsim/navigation_multisat/generated_config.json --output-dir reports
MPLBACKEND=Agg python -m pytest tests/navigation tests/integration/test_signalsim_inav_symbols.py tests/integration/test_signalsim_inav_pages.py tests/integration/test_signalsim_inav_ephemeris.py tests/integration/test_multisat_navigation_collection.py
MPLBACKEND=Agg python -m pytest
```
The RF `.bin` vector is regenerated locally and remains ignored; its committed
configuration, metadata, SHA-256 tag, log, and compact prompt-to-ephemeris
artifacts make the gate reproducible without checking in hundreds of megabytes.
docs/inav_icd_mapping.md
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# Galileo I/NAV ICD source mapping
The sole normative source for this decoder is **European Union, Galileo Open
Service Signal-in-Space Interface Control Document, Issue 2.2, November 2025**.
The implementation does not infer layouts from SignalSim. SignalSim is an RF
stimulus and an independent post-decode truth source only.
Bit positions below are zero-based, MSB-first positions in the reconstructed
128-bit nominal I/NAV word. ICD table positions are one-based on-air order.
Signed values use two's complement. A scale written `2^-n*pi` converts an ICD
semi-circle value to radians.
## Channel coding and page construction
| Implementation | ICD reference | Implemented definition |
| --- | --- | --- |
| E1-B symbol rate | §3.4.2 and Table 3 | 250 symbols/s; one symbol spans one 4 ms primary-code epoch |
| Page-part layout | §4.3.2 and Table 37 | 10 uncoded sync symbols followed by 240 interleaved FEC symbols; one second total |
| Synchronization | §4.3.2.1 | `0101100000`; repeated boundaries 250 symbols apart are required |
| Nominal page | §4.3.2.3 and Table 38 | Sequential even/odd one-second page parts form one 2-second vertical E1-B page |
| Tail | §4.3.2.2 and Table 38 | Six zero tail bits terminate each 120-bit page part |
| Convolutional FEC | §4.1.4.1, Figure 13, Table 26 | Rate 1/2, K=7, G1=171 octal, G2=133 octal, second encoder output inverted |
| Interleaver | §4.1.4.2 and Table 27 | 30 columns × 8 rows; write by column and read by row; decoder applies the reverse permutation |
| Independent coded vector | Annex D.2 | Exact ICD I/NAV encoded and interleaved page-part vector is used by unit tests |
| CRC | §5.1.9.4, Equations 25–26 | 24-bit CRC, generator `0x1864CFB`, zero initial remainder, MSB-first protected bits |
| CRC coverage | §4.3.2.3 and Table 38 | Even/odd, page type, both data parts, OSNMA, SAR and spare; sync, SSP and tails excluded |
`InavPageDecoder` reconstructs the 128-bit data word from even bits 2–113 and
odd bits 2–17. CRC is evaluated over even bits 0–113 and odd bits 0–81, against
odd bits 82–105, exactly matching the E1-B vertical-page allocation in Table 38.
## Critical word layouts and scales
| Word | Field | Word bit range | Width | Signed | Scale | Unit | ICD allocation | ICD definition |
| ---: | --- | ---: | ---: | :---: | ---: | --- | --- | --- |
| 1 | Type | 0–5 | 6 | No | 1 | — | Table 42 | §4.3.5 |
| 1 | IODnav | 6–15 | 10 | No | 1 | — | Table 42 | §5.1.8.1 |
| 1 | t0e | 16–29 | 14 | No | 60 | s | Table 42 | Table 67 |
| 1 | M0 | 30–61 | 32 | Yes | 2^-31*pi | rad | Table 42 | Table 67 |
| 1 | e | 62–93 | 32 | No | 2^-33 | — | Table 42 | Table 67 |
| 1 | sqrt(A) | 94–125 | 32 | No | 2^-19 | m^1/2 | Table 42 | Table 67 |
| 2 | IODnav | 6–15 | 10 | No | 1 | — | Table 43 | §5.1.8.1 |
| 2 | Omega0 | 16–47 | 32 | Yes | 2^-31*pi | rad | Table 43 | Table 67 |
| 2 | i0 | 48–79 | 32 | Yes | 2^-31*pi | rad | Table 43 | Table 67 |
| 2 | omega | 80–111 | 32 | Yes | 2^-31*pi | rad | Table 43 | Table 67 |
| 2 | i-dot | 112–125 | 14 | Yes | 2^-43*pi | rad/s | Table 43 | Table 67 |
| 3 | IODnav | 6–15 | 10 | No | 1 | — | Table 44 | §5.1.8.1 |
| 3 | Omega-dot | 16–39 | 24 | Yes | 2^-43*pi | rad/s | Table 44 | Table 67 |
| 3 | Delta-n | 40–55 | 16 | Yes | 2^-43*pi | rad/s | Table 44 | Table 67 |
| 3 | Cuc | 56–71 | 16 | Yes | 2^-29 | rad | Table 44 | Table 67 |
| 3 | Cus | 72–87 | 16 | Yes | 2^-29 | rad | Table 44 | Table 67 |
| 3 | Crc | 88–103 | 16 | Yes | 2^-5 | m | Table 44 | Table 67 |
| 3 | Crs | 104–119 | 16 | Yes | 2^-5 | m | Table 44 | Table 67 |
| 3 | SISA(E1,E5b) | 120–127 | 8 | No | index | — | Table 44 | §5.1.11.1 |
| 4 | IODnav | 6–15 | 10 | No | 1 | — | Table 45 | §5.1.8.1 |
| 4 | SVID | 16–21 | 6 | No | 1 | — | Table 45 | §5.1.8.2 |
| 4 | Cic | 22–37 | 16 | Yes | 2^-29 | rad | Table 45 | Table 67 |
| 4 | Cis | 38–53 | 16 | Yes | 2^-29 | rad | Table 45 | Table 67 |
| 4 | t0c | 54–67 | 14 | No | 60 | s | Table 45 | Table 70 |
| 4 | af0 | 68–98 | 31 | Yes | 2^-34 | s | Table 45 | Table 70 |
| 4 | af1 | 99–119 | 21 | Yes | 2^-46 | s/s | Table 45 | Table 70 |
| 4 | af2 | 120–125 | 6 | Yes | 2^-59 | s/s^2 | Table 45 | Table 70 |
| 5 | ai0 | 6–16 | 11 | No | 2^-2 | sfu | Table 46 | Table 74 |
| 5 | ai1 | 17–27 | 11 | Yes | 2^-8 | sfu/degree | Table 46 | Table 74 |
| 5 | ai2 | 28–41 | 14 | Yes | 2^-15 | sfu/degree^2 | Table 46 | Table 74 |
| 5 | Disturbance flags 1–5 | 42–46 | 5 | No | Boolean | — | Table 46 | Table 74 |
| 5 | BGD(E1,E5a) | 47–56 | 10 | Yes | 2^-32 | s | Table 46 | Table 72 |
| 5 | BGD(E1,E5b) | 57–66 | 10 | Yes | 2^-32 | s | Table 46 | Table 72 |
| 5 | E5b/E1B health | 67–70 | 2+2 | No | status | — | Table 46 | Table 84 |
| 5 | E5b/E1B DVS | 71–72 | 1+1 | No | status | — | Table 46 | §5.1.10 |
| 5 | GST week | 73–84 | 12 | No | 1 | week | Table 46 | Table 69 |
| 5 | GST TOW | 85–104 | 20 | No | 1 | s | Table 46 | Table 69 |
| 6 | A0 | 6–37 | 32 | Yes | 2^-30 | s | Table 47 | Table 75 |
| 6 | A1 | 38–61 | 24 | Yes | 2^-50 | s/s | Table 47 | Table 75 |
| 6 | Delta-tLS | 62–69 | 8 | Yes | 1 | s | Table 47 | Table 75 |
| 6 | t0t | 70–77 | 8 | No | 3600 | s | Table 47 | Table 75 |
| 6 | WN0t | 78–85 | 8 | No | 1 | week modulo 256 | Table 47 | Table 75 |
| 6 | WNLSF | 86–93 | 8 | No | 1 | week modulo 256 | Table 47 | Table 75 |
| 6 | DN | 94–96 | 3 | No | 1 | day | Table 47 | Table 75 |
| 6 | Delta-tLSF | 97–104 | 8 | Yes | 1 | s | Table 47 | Table 75 |
| 6 | TOW | 105–124 | 20 | No | 1 | s | Table 47 | Table 69 |
## Implemented support boundary
Word types 1–6 are parsed into typed dataclasses. They provide the complete
four-word ephemeris, satellite clock polynomial, BGD, E1B health/DVS, GST,
ionosphere coefficients and GST–UTC parameters required by the pre-PVT gate.
Almanac words and OSNMA authentication are intentionally outside this milestone.
Unsupported word types remain preserved as CRC-valid raw page evidence and do
not update the active navigation database.
docs/navigation_hardware_software_partition.md
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# Navigation hardware/software partition
The measured partition keeps sample-rate work in the tracking IP and performs
I/NAV decoding in software. No result in this milestone justifies placing a
soft-decision Viterbi decoder or navigation database in RTL.
## Tracking-IP output contract
One record is emitted for every 4 ms E1B primary-code epoch:
| Field | Proposed representation | Meaning |
| --- | --- | --- |
| PRN/channel | unsigned integer | Logical satellite and component |
| start/end timestamp | 64-bit sample counters | Continuous receiver time association |
| Prompt I/Q | signed fixed-point accumulators | Unreduced coherent evidence |
| carrier phase/frequency | NCO state/measurement words | Reprocessing and phase diagnostics |
| code phase | unsigned fixed-point chips | Code-time association |
| C/N0 | fixed-point dB-Hz or invalid | Monitoring only |
| carrier/code lock | bits | Decoder validity gate |
| cycle slip/discontinuity | bits | Immediate symbol/page synchronizer reset |
| valid | bit | Transaction validity |
The interface should use an AXI-Stream-like `valid/ready` transaction. A FIFO
must absorb software service latency; backpressure cannot be allowed to stop the
sample-rate tracking datapath. At 250 records/s/channel, even 36 active E1B
channels produce only 9000 records/s, so a memory-mapped DMA ring is sufficient.
## Software decoder
Software retains floating `numpy.float64` prompt/soft values in the reference
model and performs:
```text
prompt axis and symbol synchronization
-> page synchronization and polarity resolution
-> 30x8 deinterleaving
-> soft Viterbi decode
-> vertical-page assembly and CRC-24Q
-> typed word parsing
-> atomic IODnav ephemeris assembly
-> GST/clock/health navigation database
```
This split keeps policy-rich, low-rate state machines inspectable and updateable.
The saved `prompt_epochs.npz` files are the exact boundary between future RTL
tracking and the software decoder. HDL verification shall replay the same RF
vector, compare each tracking epoch with the bit-true model, then feed the RTL
prompt records into this decoder without SignalSim truth.
## Conditions that could justify later hardware offload
Only measured CPU load, power, or startup-latency failure should trigger an
offload study. Plausible granular offloads are symbol accumulate-and-dump,
deinterleaver address generation, or a shared Viterbi accelerator. CRC, word
parsing, ephemeris consistency, time rollover handling, and the navigation store
remain better software candidates because their throughput is negligible and
their standards/policy behavior is state-rich.