TARGET := steval_mki217v1_test

APP_SRCS := \
	main.c \
	src/lsm6dsox.c

BSP_SRCS := init.c uart.c plic.c irq.c pmod_spi.c

# Genesys2 fabric/UART and CLINT defaults. Top-level board builds may override.
BSP_UART_CLOCK_HZ ?= 50000000
BSP_CLINT_TIMEBASE_HZ ?= 500000

LSM6DSOX_ODR_HZ ?= 104
CAPTURE_DURATION_S ?= 60

include ../common/app.mk

CFLAGS += -Iheader
CFLAGS += -DLSM6DSOX_ODR_HZ=$(LSM6DSOX_ODR_HZ) \
	-DCAPTURE_DURATION_S=$(CAPTURE_DURATION_S)
