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Merge tdk_new and Ti375 Efinity support

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Keep the current GPS software and Genesys2/VCU118 flows while integrating Ti375C529 Efinity, flash, programming, and debug support. Add board-specific SPI NOR profiles and persistent GPS flash layouts across all three boards.
This commit is contained in:
onur
2026-08-13 01:28:46 +03:00
parent a25a1a61d0 dc5796e2fc
commit 1dbd1b5151
33 changed files with 2434 additions and 180 deletions
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soc/software/bsp/drivers/spi_flash.c
+50 -9
View File
@@ -17,17 +17,27 @@
#define FLASH_CMD_WRITE_DISABLE 0x04u
#define FLASH_CMD_WRITE_ENABLE 0x06u
#define FLASH_CMD_READ_CONFIG 0x35u
#define FLASH_CMD_CLEAR_STATUS 0x30u
#define FLASH_CMD_RESET 0xf0u
#define FLASH_CMD_READ_4B 0x13u
#define FLASH_CMD_PROGRAM_4B 0x12u
#define FLASH_CMD_ERASE_4B 0xdcu
#define FLASH_STATUS_WIP (1u << 0)
#define FLASH_STATUS_WEL (1u << 1)
#define FLASH_STATUS_E_ERR (1u << 5)
#define FLASH_STATUS_P_ERR (1u << 6)
#define FLASH_STATUS_ERROR (FLASH_STATUS_E_ERR | FLASH_STATUS_P_ERR)
#define FLASH_STATUS_WIP (1u << 0)
#define FLASH_STATUS_WEL (1u << 1)
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
#define FLASH_CMD_CLEAR_STATUS 0x30u
#define FLASH_CMD_RESET 0xf0u
#define FLASH_STATUS_ERROR ((1u << 5) | (1u << 6))
#elif BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_MT25QU01G
#define FLASH_CMD_RESET_ENABLE 0x66u
#define FLASH_CMD_RESET_MEMORY 0x99u
#define FLASH_CMD_READ_FLAG_STATUS 0x70u
#define FLASH_CMD_CLEAR_FLAG_STATUS 0x50u
#define FLASH_FLAG_STATUS_ERROR ((1u << 1) | (1u << 4) | (1u << 5))
#elif BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_IS25WP512M
#define FLASH_CMD_RESET_ENABLE 0x66u
#define FLASH_CMD_RESET_MEMORY 0x99u
#endif
#define FLASH_RESET_DELAY_US 300u
#define FLASH_PROGRAM_TIMEOUT_US 100000u
@@ -104,6 +114,7 @@ static bool flash_wait_complete(uint32_t timeout_us)
do {
status = bsp_spi_flash_read_status();
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
if ((status & FLASH_STATUS_ERROR) != 0u) {
/* S25FL-S deliberately holds WIP high after a program/erase error
* until CLSR is issued. Clear the latched failure so a later request
@@ -111,7 +122,15 @@ static bool flash_wait_complete(uint32_t timeout_us)
flash_cmd(FLASH_CMD_CLEAR_STATUS);
return false;
}
#endif
if ((status & FLASH_STATUS_WIP) == 0u) {
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_MT25QU01G
uint8_t flags = flash_read_register(FLASH_CMD_READ_FLAG_STATUS);
if ((flags & FLASH_FLAG_STATUS_ERROR) != 0u) {
flash_cmd(FLASH_CMD_CLEAR_FLAG_STATUS);
return false;
}
#endif
return true;
}
} while ((bsp_read64(BSP_CLINT_MTIME) - start) < timeout_ticks);
@@ -121,11 +140,20 @@ static bool flash_wait_complete(uint32_t timeout_us)
static bool flash_write_enable(void)
{
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
flash_cmd(FLASH_CMD_CLEAR_STATUS);
#elif BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_MT25QU01G
flash_cmd(FLASH_CMD_CLEAR_FLAG_STATUS);
#endif
flash_cmd(FLASH_CMD_WRITE_ENABLE);
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
return (bsp_spi_flash_read_status() &
(FLASH_STATUS_WIP | FLASH_STATUS_WEL | FLASH_STATUS_ERROR)) ==
FLASH_STATUS_WEL;
#else
return (bsp_spi_flash_read_status() &
(FLASH_STATUS_WIP | FLASH_STATUS_WEL)) == FLASH_STATUS_WEL;
#endif
}
static bool flash_verify(uint32_t flash_addr, const uint8_t *expected,
@@ -156,7 +184,12 @@ void bsp_spi_flash_init(void)
void bsp_spi_flash_reset(void)
{
spi_select(0);
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
flash_cmd(FLASH_CMD_RESET);
#else
flash_cmd(FLASH_CMD_RESET_ENABLE);
flash_cmd(FLASH_CMD_RESET_MEMORY);
#endif
flash_delay_us(FLASH_RESET_DELAY_US);
}
@@ -179,7 +212,11 @@ uint8_t bsp_spi_flash_read_status(void)
uint8_t bsp_spi_flash_read_config(void)
{
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
return flash_read_register(FLASH_CMD_READ_CONFIG);
#else
return 0u;
#endif
}
void bsp_spi_flash_read(uint32_t flash_addr, void *dst, uint32_t len)
@@ -202,9 +239,13 @@ void bsp_spi_flash_read(uint32_t flash_addr, void *dst, uint32_t len)
bool bsp_spi_flash_erase_sector(uint32_t flash_addr)
{
if ((flash_addr & (BSP_SPI_FLASH_SECTOR_SIZE - 1u)) != 0u ||
!flash_range_valid(flash_addr, BSP_SPI_FLASH_SECTOR_SIZE) ||
!flash_range_valid(flash_addr, BSP_SPI_FLASH_SECTOR_SIZE)
#if BSP_SPI_FLASH_PROFILE == BSP_SPI_FLASH_PROFILE_S25FL256S
||
((flash_addr >= (BSP_SPI_FLASH_SIZE - (2u * BSP_SPI_FLASH_SECTOR_SIZE))) &&
((bsp_spi_flash_read_config() & BSP_SPI_FLASH_CONFIG_TBPARM) != 0u))) {
((bsp_spi_flash_read_config() & BSP_SPI_FLASH_CONFIG_TBPARM) != 0u))
#endif
) {
return false;
}
if (!flash_wait_complete(FLASH_PROGRAM_TIMEOUT_US) || !flash_write_enable()) {