Document STEVAL INT1 hardware verification

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2026-07-16 17:51:43 +03:00
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@@ -14,13 +14,15 @@ be integrated separately after the IMU link is verified.
| SDA | JC2 | SPI MOSI / SDI |
| SDO | JC3 | SPI MISO |
| SCL | JC4 | SPI clock / SPC |
| INT1 | JC9 | active-high data-ready interrupt |
| VDD | 3.3 V | sensor supply |
| VDDIO | 3.3 V | digital I/O supply |
| GND | GND | common ground |
| INT1 | JB1 | active-high data-ready interrupt |
| VDD | JC6 / 3.3 V | sensor supply |
| VDDIO | JC12 / 3.3 V | digital I/O supply |
| GND | JC5 or JC11 | common ground |
`CS` is mandatory for four-wire SPI. Never feed 5 V to VDDIO. JC9 is routed
through the FPGA 3FF synchronizer to PLIC device 11.
`CS` is mandatory for four-wire SPI. Never feed 5 V to VDDIO. The current
Genesys2 constraint routes JB1 (`V29`) through the FPGA 3FF synchronizer to
PLIC device 11. Older README revisions named JC9 (`AK30`); that mapping is no
longer valid. JC10 is reserved for the GPS PPS output.
## Hardware bring-up results (2026-07-13)
@@ -65,6 +67,36 @@ These measurements are for the stationary board in its test orientation. The
nonzero gyro mean is startup bias to be estimated by stationary calibration,
not angular motion.
### INT1 live recheck (2026-07-16)
The current `tdk_ekf` Genesys2 bitstream was reused without synthesis. The
standalone ELF was loaded into DTIM through the already-running OpenOCD/GDB
server and UART was observed on `/dev/ttyUSB2` at 115200 baud.
With only SPI connected, all eight `WHO_AM_I` probes returned `0x6c`,
configuration read-back was `CTRL1_XL=0x40`, `CTRL2_G=0x40`,
`CTRL3_C=0x44`, `STATUS=0x07`, and foreground polling returned coherent
samples. No `IMU_RAW` rows arrived from the interrupt test and the final
`interrupt_count` was zero. This separated a working SPI/data path from a
missing physical interrupt connection.
After STEVAL `INT1` was moved to Genesys2 JB1, the same ELF immediately
produced continuous interrupt-driven `IMU_RAW` rows. A live counter snapshot
showed:
- `interrupt_count=4084` and `interrupt_sample_count=4084`;
- `interrupt_read_fail_count=0` and `queue_overflow_count=0`;
- `unexpected_irq_count=0` and `unexpected_trap_cause=0`;
- sequence 0 through 1165 covered 11.012478 seconds, corresponding to
105.789 Hz and a 9.453 ms mean period for the configured 104 Hz ODR.
One representative stationary sample was accel `[-3854, -9397, -13071]`,
gyro `[35, -4, -32]`, and temperature raw `1265`. The sequence continued
monotonically during the observed UART window. This verifies the physical
STEVAL INT1 -> JB1/V29 -> 3FF synchronizer -> PLIC 11 -> C ISR -> SPI burst ->
SPSC queue path. It does not yet constitute a combined GPS + ST + ESKF moving
platform test.
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