minor changes

soc/software/bsp/drivers/pmod_spi.c

@@ -13,6 +13,23 @@
 #define PMOD_SPI_CTRL_QUAD 0x4u
 
 static uint32_t pmod_spi_ctrl_shadow = PMOD_SPI_CTRL_CSN;
+static uint32_t pmod_spi_cs_setup_us;
+static uint32_t pmod_spi_inter_byte_us;
+static uint32_t pmod_spi_cs_hold_us;
+static uint32_t pmod_spi_cs_inactive_us;
+
+static void pmod_spi_delay_us(uint32_t us)
+{
+  if (us == 0u) {
+    return;
+  }
+
+  const uint64_t ticks =
+      ((uint64_t)BSP_CLINT_TIMEBASE_HZ * us + 999999u) / 1000000u;
+  const uint64_t start = bsp_read64(BSP_CLINT_MTIME);
+  while ((bsp_read64(BSP_CLINT_MTIME) - start) < ticks) {
+  }
+}
 
 static void pmod_spi_wait_ready(void)
 {
@@ -55,6 +72,17 @@ void bsp_pmod_spi_set_quad(int enabled)
   bsp_pmod_spi_set_mode(enabled ? BSP_PMOD_SPI_MODE_QUAD : BSP_PMOD_SPI_MODE_SINGLE);
 }
 
+void bsp_pmod_spi_set_timing(uint32_t cs_setup_us,
+                             uint32_t inter_byte_us,
+                             uint32_t cs_hold_us,
+                             uint32_t cs_inactive_us)
+{
+  pmod_spi_cs_setup_us = cs_setup_us;
+  pmod_spi_inter_byte_us = inter_byte_us;
+  pmod_spi_cs_hold_us = cs_hold_us;
+  pmod_spi_cs_inactive_us = cs_inactive_us;
+}
+
 void bsp_pmod_spi_select(void)
 {
   pmod_spi_write_ctrl(pmod_spi_ctrl_shadow & ~PMOD_SPI_CTRL_CSN);
@@ -109,3 +137,68 @@ void bsp_pmod_spi_transfer(const uint8_t *tx, uint8_t *rx, size_t len)
     }
   }
 }
+
+void bsp_pmod_spi_transaction(const uint8_t *tx, uint8_t *rx, size_t len)
+{
+  if (len == 0u) {
+    return;
+  }
+
+  bsp_pmod_spi_select();
+  pmod_spi_delay_us(pmod_spi_cs_setup_us);
+
+  for (size_t i = 0; i < len; ++i) {
+    const uint8_t out = tx ? tx[i] : 0xffu;
+    const uint8_t in = bsp_pmod_spi_xfer8(out);
+    if (rx) {
+      rx[i] = in;
+    }
+    if ((i + 1u) < len) {
+      pmod_spi_delay_us(pmod_spi_inter_byte_us);
+    }
+  }
+
+  pmod_spi_delay_us(pmod_spi_cs_hold_us);
+  bsp_pmod_spi_deselect();
+  pmod_spi_delay_us(pmod_spi_cs_inactive_us);
+}
+
+void bsp_pmod_spi_write_reg8(uint8_t command, uint8_t value)
+{
+  const uint8_t tx[2] = {command, value};
+  bsp_pmod_spi_transaction(tx, NULL, sizeof(tx));
+}
+
+void bsp_pmod_spi_read_regs(uint8_t command,
+                            uint8_t dummy,
+                            uint8_t *data,
+                            size_t len)
+{
+  if ((data == NULL) || (len == 0u)) {
+    return;
+  }
+
+  bsp_pmod_spi_select();
+  pmod_spi_delay_us(pmod_spi_cs_setup_us);
+
+  (void)bsp_pmod_spi_xfer8(command);
+  pmod_spi_delay_us(pmod_spi_inter_byte_us);
+
+  for (size_t i = 0; i < len; ++i) {
+    data[i] = bsp_pmod_spi_xfer8(dummy);
+    if ((i + 1u) < len) {
+      pmod_spi_delay_us(pmod_spi_inter_byte_us);
+    }
+  }
+
+  pmod_spi_delay_us(pmod_spi_cs_hold_us);
+  bsp_pmod_spi_deselect();
+  pmod_spi_delay_us(pmod_spi_cs_inactive_us);
+}
+
+uint8_t bsp_pmod_spi_read_reg8(uint8_t command, uint8_t dummy)
+{
+  uint8_t value = 0xffu;
+  bsp_pmod_spi_read_regs(command, dummy, &value, 1u);
+  return value;
+}

soc/software/bsp/include/bsp/pmod_spi.h

@@ -13,6 +13,16 @@ void bsp_pmod_spi_init(void);
 void bsp_pmod_spi_set_mode(bsp_pmod_spi_mode_t mode);
 bsp_pmod_spi_mode_t bsp_pmod_spi_mode(void);
 void bsp_pmod_spi_set_quad(int enabled);
+
+/*
+ * Configure delays used by the chip-select-managed transaction helpers.
+ * All values are in microseconds. Zero disables the corresponding delay.
+ */
+void bsp_pmod_spi_set_timing(uint32_t cs_setup_us,
+                             uint32_t inter_byte_us,
+                             uint32_t cs_hold_us,
+                             uint32_t cs_inactive_us);
+
 void bsp_pmod_spi_select(void);
 void bsp_pmod_spi_deselect(void);
 int bsp_pmod_spi_ready(void);
@@ -20,6 +30,22 @@ uint32_t bsp_pmod_spi_ctrl(void);
 uint32_t bsp_pmod_spi_rx(void);
 uint8_t bsp_pmod_spi_xfer8(uint8_t value);
 uint32_t bsp_pmod_spi_xfer32(uint32_t value);
+
+/* Raw byte transfer; the caller controls chip select. */
 void bsp_pmod_spi_transfer(const uint8_t *tx, uint8_t *rx, size_t len);
 
+/* Byte transaction with chip select and the configured timing delays. */
+void bsp_pmod_spi_transaction(const uint8_t *tx, uint8_t *rx, size_t len);
+
+/*
+ * Register helpers accept the complete command byte. The caller is
+ * responsible for applying device-specific read/write bits to command.
+ */
+void bsp_pmod_spi_write_reg8(uint8_t command, uint8_t value);
+uint8_t bsp_pmod_spi_read_reg8(uint8_t command, uint8_t dummy);
+void bsp_pmod_spi_read_regs(uint8_t command,
+                            uint8_t dummy,
+                            uint8_t *data,
+                            size_t len);
+
 #endif