/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Enum Utility Definitions *| |* *| |* Automatically generated file, do not edit! *| |* From: EmitCAttributes.td *| |* *| \*===----------------------------------------------------------------------===*/ namespace mlir::emitc { ::llvm::StringRef stringifyClassType(ClassType val) { switch (val) { case ClassType::class_: return "class"; case ClassType::struct_: return "struct"; case ClassType::union_: return "union"; } return ""; } ::std::optional symbolizeClassType(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("class", ClassType::class_) .Case("struct", ClassType::struct_) .Case("union", ClassType::union_) .Default(::std::nullopt); } ::std::optional symbolizeClassType(uint32_t value) { switch (value) { case 0: return ClassType::class_; case 1: return ClassType::struct_; case 2: return ClassType::union_; default: return ::std::nullopt; } } bool ClassTypeAttr::classof(::mlir::Attribute attr) { return (((::llvm::isa<::mlir::IntegerAttr>(attr))) && ((::llvm::cast<::mlir::IntegerAttr>(attr).getType().isSignlessInteger(32)))) && ((( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(32, 0)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(32, 1)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(32, 2))))); } ClassTypeAttr ClassTypeAttr::get(::mlir::MLIRContext *context, ClassType val) { ::mlir::IntegerType intType = ::mlir::IntegerType::get(context, 32); ::mlir::IntegerAttr baseAttr = ::mlir::IntegerAttr::get(intType, static_cast(val)); return ::llvm::cast(baseAttr); } ClassType ClassTypeAttr::getValue() const { return static_cast(::mlir::IntegerAttr::getValue().getZExtValue()); } } // namespace mlir::emitc namespace mlir::emitc { ::llvm::StringRef stringifyCmpPredicate(CmpPredicate val) { switch (val) { case CmpPredicate::eq: return "eq"; case CmpPredicate::ne: return "ne"; case CmpPredicate::lt: return "lt"; case CmpPredicate::le: return "le"; case CmpPredicate::gt: return "gt"; case CmpPredicate::ge: return "ge"; case CmpPredicate::three_way: return "three_way"; } return ""; } ::std::optional symbolizeCmpPredicate(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("eq", CmpPredicate::eq) .Case("ne", CmpPredicate::ne) .Case("lt", CmpPredicate::lt) .Case("le", CmpPredicate::le) .Case("gt", CmpPredicate::gt) .Case("ge", CmpPredicate::ge) .Case("three_way", CmpPredicate::three_way) .Default(::std::nullopt); } ::std::optional symbolizeCmpPredicate(uint64_t value) { switch (value) { case 0: return CmpPredicate::eq; case 1: return CmpPredicate::ne; case 2: return CmpPredicate::lt; case 3: return CmpPredicate::le; case 4: return CmpPredicate::gt; case 5: return CmpPredicate::ge; case 6: return CmpPredicate::three_way; default: return ::std::nullopt; } } bool CmpPredicateAttr::classof(::mlir::Attribute attr) { return (((::llvm::isa<::mlir::IntegerAttr>(attr))) && ((::llvm::cast<::mlir::IntegerAttr>(attr).getType().isSignlessInteger(64)))) && ((( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 0)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 1)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 2)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 3)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 4)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 5)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 6))))); } CmpPredicateAttr CmpPredicateAttr::get(::mlir::MLIRContext *context, CmpPredicate val) { ::mlir::IntegerType intType = ::mlir::IntegerType::get(context, 64); ::mlir::IntegerAttr baseAttr = ::mlir::IntegerAttr::get(intType, static_cast(val)); return ::llvm::cast(baseAttr); } CmpPredicate CmpPredicateAttr::getValue() const { return static_cast(::mlir::IntegerAttr::getValue().getZExtValue()); } } // namespace mlir::emitc