#include "bsp/irq.h"

#define MSTATUS_MIE (1u << 3)
#define MIE_MTIE    (1u << 7)
#define MIE_MEIE    (1u << 11)

uint64_t bsp_read_mcause(void)
{
  uint64_t value;
  asm volatile ("csrr %0, mcause" : "=r"(value));
  return value;
}

void bsp_set_mtvec(void (*handler)(void))
{
  asm volatile ("csrw mtvec, %0" :: "r"(handler));
}

void bsp_enable_machine_external_interrupts(void)
{
  uint64_t mie = MIE_MEIE;
  uint64_t mstatus = MSTATUS_MIE;
  asm volatile ("csrs mie, %0" :: "r"(mie));
  asm volatile ("csrs mstatus, %0" :: "r"(mstatus));
}

void bsp_enable_machine_timer_interrupts(void)
{
  uint64_t mie = MIE_MTIE;
  uint64_t mstatus = MSTATUS_MIE;
  asm volatile ("csrs mie, %0" :: "r"(mie));
  asm volatile ("csrs mstatus, %0" :: "r"(mstatus));
}

uint64_t bsp_irq_save(void)
{
  uint64_t state;
  uint64_t mask = MSTATUS_MIE;
  asm volatile ("csrrc %0, mstatus, %1" : "=r"(state) : "r"(mask) : "memory");
  return state;
}

void bsp_irq_restore(uint64_t state)
{
  if ((state & MSTATUS_MIE) != 0u) {
    uint64_t mask = MSTATUS_MIE;
    asm volatile ("csrs mstatus, %0" :: "r"(mask) : "memory");
  }
}