# Genesys2 Rocket debug over Xilinx BSCAN.
#
# This reaches the Rocket DMI debug port through:
#   Digilent FTDI JTAG -> Xilinx XC7K325T TAP -> BSCANE2 USER chain -> DMI tunnel

adapter driver ftdi
ftdi device_desc "Digilent Adept USB Device"
ftdi vid_pid 0x0403 0x6010
# Genesys2 exposes the FPGA JTAG TAP on FT2232H channel B. Channel A is not the
# chain that reaches the Kintex-7 TAP on this board.
ftdi channel 1
# Digilent Adept 6010 wiring uses the HS1-style four-wire JTAG layout here; no
# dedicated board reset is controlled by OpenOCD.
ftdi layout_init 0x0088 0x008b
reset_config none

if {![info exists ADAPTER_SPEED]} {
  set ADAPTER_SPEED 1000
}
adapter speed $ADAPTER_SPEED

if {![info exists CHIPNAME]} {
  set CHIPNAME xc7
}
source [find cpld/xilinx-xc7.cfg]

target create rocket.cpu riscv -chain-position xc7.tap -coreid 0

# Match hardware/fpga/genesys2/rtl/rocket_bscan_dmi_tunnel.sv.
riscv set_ir dtmcs 0x10
riscv set_ir dmi 0x11
riscv use_bscan_tunnel 5 0

riscv set_reset_timeout_sec 10
riscv set_command_timeout_sec 10

init
halt