// Generated by CIRCT firtool-1.151.0
module FPToFP(
  input         clock,
                reset,
                io_in_valid,
                io_in_bits_ren2,
  input  [1:0]  io_in_bits_typeTagOut,
  input         io_in_bits_wflags,
  input  [2:0]  io_in_bits_rm,
  input  [64:0] io_in_bits_in1,
                io_in_bits_in2,
  output [64:0] io_out_bits_data,
  output [4:0]  io_out_bits_exc,
  input         io_lt
);

  wire [32:0] _narrower_io_out;
  wire [4:0]  _narrower_io_exceptionFlags;
  reg         in_pipe_v;
  reg         in_pipe_b_ren2;
  reg  [1:0]  in_pipe_b_typeTagOut;
  reg         in_pipe_b_wflags;
  reg  [2:0]  in_pipe_b_rm;
  reg  [64:0] in_pipe_b_in1;
  reg  [64:0] in_pipe_b_in2;
  wire        isnan1 = &(in_pipe_b_in1[63:61]);
  wire        isnan2 = &(in_pipe_b_in2[63:61]);
  wire        _GEN = in_pipe_b_wflags & ~in_pipe_b_ren2;
  wire [64:0] fsgnjMux_data =
    _GEN
      ? ((&(in_pipe_b_in1[63:61])) ? 65'hE008000000000000 : in_pipe_b_in1)
      : in_pipe_b_wflags
          ? (isnan1 & isnan2
               ? 65'hE008000000000000
               : isnan2 | in_pipe_b_rm[0] != io_lt & ~isnan1
                   ? in_pipe_b_in1
                   : in_pipe_b_in2)
          : {in_pipe_b_rm[1]
               ? in_pipe_b_in1[64] ^ in_pipe_b_in2[64]
               : in_pipe_b_rm[0] ^ in_pipe_b_in2[64],
             in_pipe_b_in1[63:0]};
  reg  [64:0] io_out_pipe_b_data;
  reg  [4:0]  io_out_pipe_b_exc;
  always @(posedge clock) begin
    if (reset)
      in_pipe_v <= 1'h0;
    else
      in_pipe_v <= io_in_valid;
    if (io_in_valid) begin
      in_pipe_b_ren2 <= io_in_bits_ren2;
      in_pipe_b_typeTagOut <= io_in_bits_typeTagOut;
      in_pipe_b_wflags <= io_in_bits_wflags;
      in_pipe_b_rm <= io_in_bits_rm;
      in_pipe_b_in1 <= io_in_bits_in1;
      in_pipe_b_in2 <= io_in_bits_in2;
    end
    if (in_pipe_v) begin
      automatic logic       _GEN_0 = in_pipe_b_typeTagOut == 2'h0;
      automatic logic [8:0] _mux_data_expOut_commonCase_T = fsgnjMux_data[60:52] - 9'h100;
      io_out_pipe_b_data <=
        _GEN_0
          ? (_GEN
               ? {fsgnjMux_data[64:33], _narrower_io_out}
               : {fsgnjMux_data[64:33],
                  fsgnjMux_data[64],
                  fsgnjMux_data[63:61] == 3'h0 | fsgnjMux_data[63:61] > 3'h5
                    ? {fsgnjMux_data[63:61], _mux_data_expOut_commonCase_T[5:0]}
                    : _mux_data_expOut_commonCase_T,
                  fsgnjMux_data[51:29]})
          : fsgnjMux_data;
      io_out_pipe_b_exc <=
        _GEN & _GEN_0
          ? _narrower_io_exceptionFlags
          : _GEN
              ? {(&(in_pipe_b_in1[63:61])) & ~(in_pipe_b_in1[51]), 4'h0}
              : in_pipe_b_wflags
                  ? {(&(in_pipe_b_in1[63:61])) & ~(in_pipe_b_in1[51])
                       | (&(in_pipe_b_in2[63:61])) & ~(in_pipe_b_in2[51]),
                     4'h0}
                  : 5'h0;
    end
  end // always @(posedge)
  RecFNToRecFN narrower (
    .io_in             (in_pipe_b_in1),
    .io_roundingMode   (in_pipe_b_rm),
    .io_out            (_narrower_io_out),
    .io_exceptionFlags (_narrower_io_exceptionFlags)
  );
  assign io_out_bits_data = io_out_pipe_b_data;
  assign io_out_bits_exc = io_out_pipe_b_exc;
endmodule