/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Enum Utility Definitions *| |* *| |* Automatically generated file, do not edit! *| |* From: ParallelLoopMapperAttr.td *| |* *| \*===----------------------------------------------------------------------===*/ namespace mlir::gpu { ::llvm::StringRef stringifyAddressSpace(AddressSpace val) { switch (val) { case AddressSpace::Global: return "global"; case AddressSpace::Workgroup: return "workgroup"; case AddressSpace::Private: return "private"; case AddressSpace::Constant: return "constant"; } return ""; } ::std::optional symbolizeAddressSpace(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("global", AddressSpace::Global) .Case("workgroup", AddressSpace::Workgroup) .Case("private", AddressSpace::Private) .Case("constant", AddressSpace::Constant) .Default(::std::nullopt); } ::std::optional symbolizeAddressSpace(uint32_t value) { switch (value) { case 1: return AddressSpace::Global; case 2: return AddressSpace::Workgroup; case 3: return AddressSpace::Private; case 4: return AddressSpace::Constant; default: return ::std::nullopt; } } } // namespace mlir::gpu namespace mlir::gpu { ::llvm::StringRef stringifyBarrierScope(BarrierScope val) { switch (val) { case BarrierScope::Subgroup: return "subgroup"; case BarrierScope::Workgroup: return "workgroup"; case BarrierScope::Cluster: return "cluster"; } return ""; } ::std::optional symbolizeBarrierScope(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("subgroup", BarrierScope::Subgroup) .Case("workgroup", BarrierScope::Workgroup) .Case("cluster", BarrierScope::Cluster) .Default(::std::nullopt); } ::std::optional symbolizeBarrierScope(uint32_t value) { switch (value) { case 1: return BarrierScope::Subgroup; case 2: return BarrierScope::Workgroup; case 3: return BarrierScope::Cluster; default: return ::std::nullopt; } } } // namespace mlir::gpu namespace mlir::gpu { ::llvm::StringRef stringifyDimension(Dimension val) { switch (val) { case Dimension::x: return "x"; case Dimension::y: return "y"; case Dimension::z: return "z"; } return ""; } ::std::optional symbolizeDimension(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("x", Dimension::x) .Case("y", Dimension::y) .Case("z", Dimension::z) .Default(::std::nullopt); } ::std::optional symbolizeDimension(uint32_t value) { switch (value) { case 0: return Dimension::x; case 1: return Dimension::y; case 2: return Dimension::z; default: return ::std::nullopt; } } } // namespace mlir::gpu namespace mlir::gpu { ::llvm::StringRef stringifyDimensionKind(DimensionKind val) { switch (val) { case DimensionKind::Other: return "other"; case DimensionKind::Block: return "block"; case DimensionKind::Grid: return "grid"; case DimensionKind::Cluster: return "cluster"; } return ""; } ::std::optional symbolizeDimensionKind(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("other", DimensionKind::Other) .Case("block", DimensionKind::Block) .Case("grid", DimensionKind::Grid) .Case("cluster", DimensionKind::Cluster) .Default(::std::nullopt); } ::std::optional symbolizeDimensionKind(uint32_t value) { switch (value) { case 0: return DimensionKind::Other; case 1: return DimensionKind::Block; case 2: return DimensionKind::Grid; case 3: return DimensionKind::Cluster; default: return ::std::nullopt; } } } // namespace mlir::gpu namespace mlir::gpu { ::llvm::StringRef stringifyProcessor(Processor val) { switch (val) { case Processor::BlockX: return "block_x"; case Processor::BlockY: return "block_y"; case Processor::BlockZ: return "block_z"; case Processor::ThreadX: return "thread_x"; case Processor::ThreadY: return "thread_y"; case Processor::ThreadZ: return "thread_z"; case Processor::Sequential: return "sequential"; } return ""; } ::std::optional symbolizeProcessor(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("block_x", Processor::BlockX) .Case("block_y", Processor::BlockY) .Case("block_z", Processor::BlockZ) .Case("thread_x", Processor::ThreadX) .Case("thread_y", Processor::ThreadY) .Case("thread_z", Processor::ThreadZ) .Case("sequential", Processor::Sequential) .Default(::std::nullopt); } ::std::optional symbolizeProcessor(uint64_t value) { switch (value) { case 0: return Processor::BlockX; case 1: return Processor::BlockY; case 2: return Processor::BlockZ; case 3: return Processor::ThreadX; case 4: return Processor::ThreadY; case 5: return Processor::ThreadZ; case 6: return Processor::Sequential; default: return ::std::nullopt; } } bool ProcessorAttr::classof(::mlir::Attribute attr) { return (((::llvm::isa<::mlir::IntegerAttr>(attr))) && ((::llvm::cast<::mlir::IntegerAttr>(attr).getType().isSignlessInteger(64)))) && ((( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 0)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 1)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 2)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 3)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 4)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 5)))) || (( ::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 6))))); } ProcessorAttr ProcessorAttr::get(::mlir::MLIRContext *context, Processor val) { ::mlir::IntegerType intType = ::mlir::IntegerType::get(context, 64); ::mlir::IntegerAttr baseAttr = ::mlir::IntegerAttr::get(intType, static_cast(val)); return ::llvm::cast(baseAttr); } Processor ProcessorAttr::getValue() const { return static_cast(::mlir::IntegerAttr::getValue().getZExtValue()); } } // namespace mlir::gpu