/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Enum Utility Definitions *| |* *| |* Automatically generated file, do not edit! *| |* From: ROCDLOps.td *| |* *| \*===----------------------------------------------------------------------===*/ namespace mlir::ROCDL { ::llvm::StringRef stringifyBufferOOBMode(BufferOOBMode val) { switch (val) { case BufferOOBMode::Any: return "any"; case BufferOOBMode::Relaxed: return "relaxed"; case BufferOOBMode::Strict: return "strict"; } return ""; } ::std::optional symbolizeBufferOOBMode(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("any", BufferOOBMode::Any) .Case("relaxed", BufferOOBMode::Relaxed) .Case("strict", BufferOOBMode::Strict) .Default(::std::nullopt); } ::std::optional symbolizeBufferOOBMode(uint32_t value) { switch (value) { case 0: return BufferOOBMode::Any; case 1: return BufferOOBMode::Relaxed; case 2: return BufferOOBMode::Strict; default: return ::std::nullopt; } } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifyGfx12AtomicCachePolicy(Gfx12AtomicCachePolicy symbol) { auto val = static_cast(symbol); assert(2147483711u == (2147483711u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; // Print bit enum groups before individual bits if (24u == (24u & val)) { strs.push_back("scope_sys"); val &= ~static_cast(24); } if (1u == (1u & val)) strs.push_back("return"); if (2u == (2u & val)) strs.push_back("nt"); if (4u == (4u & val)) strs.push_back("cascade"); if (8u == (8u & val)) strs.push_back("scope_se"); if (16u == (16u & val)) strs.push_back("scope_dev"); if (32u == (32u & val)) strs.push_back("nv"); if (2147483648u == (2147483648u & val)) strs.push_back("volatile"); return ::llvm::join(strs, "|"); } ::std::optional symbolizeGfx12AtomicCachePolicy(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return Gfx12AtomicCachePolicy::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint32_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("return", 1) .Case("nt", 2) .Case("cascade", 4) .Case("scope_se", 8) .Case("scope_dev", 16) .Case("scope_sys", 24) .Case("nv", 32) .Case("volatile", 2147483648) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizeGfx12AtomicCachePolicy(uint32_t value) { // Special case for all bits unset. if (value == 0) return Gfx12AtomicCachePolicy::none; if (value & ~static_cast(2147483711u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifyGfx12CachePolicy(Gfx12CachePolicy symbol) { auto val = static_cast(symbol); assert(2147485823u == (2147485823u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; // Print bit enum groups before individual bits if (24u == (24u & val)) { strs.push_back("scope_sys"); val &= ~static_cast(24); } if (7u == (7u & val)) { strs.push_back("nt_wb"); val &= ~static_cast(7); } if (6u == (6u & val)) { strs.push_back("nt_ht"); val &= ~static_cast(6); } if (5u == (5u & val)) { strs.push_back("rt_nt"); val &= ~static_cast(5); } if (4u == (4u & val)) { strs.push_back("nt_rt"); val &= ~static_cast(4); } if (3u == (3u & val)) { strs.push_back("lu"); val &= ~static_cast(3); } if (1u == (1u & val)) strs.push_back("nt"); if (2u == (2u & val)) strs.push_back("ht"); if (8u == (8u & val)) strs.push_back("scope_se"); if (16u == (16u & val)) strs.push_back("scope_dev"); if (32u == (32u & val)) strs.push_back("nv"); if (64u == (64u & val)) strs.push_back("swz"); if (2048u == (2048u & val)) strs.push_back("scal"); if (2147483648u == (2147483648u & val)) strs.push_back("volatile"); return ::llvm::join(strs, "|"); } ::std::optional symbolizeGfx12CachePolicy(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return Gfx12CachePolicy::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint32_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("nt", 1) .Case("ht", 2) .Case("lu", 3) .Case("nt_rt", 4) .Case("rt_nt", 5) .Case("nt_ht", 6) .Case("nt_wb", 7) .Case("scope_se", 8) .Case("scope_dev", 16) .Case("scope_sys", 24) .Case("nv", 32) .Case("swz", 64) .Case("scal", 2048) .Case("volatile", 2147483648) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizeGfx12CachePolicy(uint32_t value) { // Special case for all bits unset. if (value == 0) return Gfx12CachePolicy::none; if (value & ~static_cast(2147485823u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifyGfx942CachePolicy(Gfx942CachePolicy symbol) { auto val = static_cast(symbol); assert(2147483675u == (2147483675u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; if (1u == (1u & val)) strs.push_back("sc0"); if (2u == (2u & val)) strs.push_back("nt"); if (8u == (8u & val)) strs.push_back("swz"); if (16u == (16u & val)) strs.push_back("sc1"); if (2147483648u == (2147483648u & val)) strs.push_back("volatile"); return ::llvm::join(strs, "|"); } ::std::optional symbolizeGfx942CachePolicy(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return Gfx942CachePolicy::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint32_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("sc0", 1) .Case("nt", 2) .Case("swz", 8) .Case("sc1", 16) .Case("volatile", 2147483648) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizeGfx942CachePolicy(uint32_t value) { // Special case for all bits unset. if (value == 0) return Gfx942CachePolicy::none; if (value & ~static_cast(2147483675u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifyMFMANegModifier(MFMANegModifier symbol) { auto val = static_cast(symbol); assert(7u == (7u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; if (1u == (1u & val)) strs.push_back("neg_a"); if (2u == (2u & val)) strs.push_back("neg_b"); if (4u == (4u & val)) strs.push_back("neg_c"); return ::llvm::join(strs, "|"); } ::std::optional symbolizeMFMANegModifier(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return MFMANegModifier::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint32_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("neg_a", 1) .Case("neg_b", 2) .Case("neg_c", 4) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizeMFMANegModifier(uint32_t value) { // Special case for all bits unset. if (value == 0) return MFMANegModifier::none; if (value & ~static_cast(7u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { ::llvm::StringRef stringifyMFMAPermB(MFMAPermB val) { switch (val) { case MFMAPermB::none: return "none"; case MFMAPermB::bcast_first_32: return "bcast_first_32"; case MFMAPermB::bcast_second_32: return "bcast_second_32"; case MFMAPermB::rotate_16_right: return "rotate_16_right"; case MFMAPermB::bcast_first_16: return "bcast_first_16"; case MFMAPermB::bcast_second_16: return "bcast_second_16"; case MFMAPermB::bcast_third_16: return "bcast_third_16"; case MFMAPermB::bcast_fourth_16: return "bcast_fourth_16"; } return ""; } ::std::optional symbolizeMFMAPermB(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("none", MFMAPermB::none) .Case("bcast_first_32", MFMAPermB::bcast_first_32) .Case("bcast_second_32", MFMAPermB::bcast_second_32) .Case("rotate_16_right", MFMAPermB::rotate_16_right) .Case("bcast_first_16", MFMAPermB::bcast_first_16) .Case("bcast_second_16", MFMAPermB::bcast_second_16) .Case("bcast_third_16", MFMAPermB::bcast_third_16) .Case("bcast_fourth_16", MFMAPermB::bcast_fourth_16) .Default(::std::nullopt); } ::std::optional symbolizeMFMAPermB(uint32_t value) { switch (value) { case 0: return MFMAPermB::none; case 1: return MFMAPermB::bcast_first_32; case 2: return MFMAPermB::bcast_second_32; case 3: return MFMAPermB::rotate_16_right; case 4: return MFMAPermB::bcast_first_16; case 5: return MFMAPermB::bcast_second_16; case 6: return MFMAPermB::bcast_third_16; case 7: return MFMAPermB::bcast_fourth_16; default: return ::std::nullopt; } } } // namespace mlir::ROCDL namespace mlir::ROCDL { ::llvm::StringRef stringifyMatrixFormat(MatrixFormat val) { switch (val) { case MatrixFormat::fp8_e4m3: return "fp8_e4m3"; case MatrixFormat::fp8_e5m2: return "fp8_e5m2"; case MatrixFormat::fp6_e2m3: return "fp6_e2m3"; case MatrixFormat::fp6_e3m2: return "fp6_e3m2"; case MatrixFormat::fp4_e2m1: return "fp4_e2m1"; } return ""; } ::std::optional symbolizeMatrixFormat(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("fp8_e4m3", MatrixFormat::fp8_e4m3) .Case("fp8_e5m2", MatrixFormat::fp8_e5m2) .Case("fp6_e2m3", MatrixFormat::fp6_e2m3) .Case("fp6_e3m2", MatrixFormat::fp6_e3m2) .Case("fp4_e2m1", MatrixFormat::fp4_e2m1) .Default(::std::nullopt); } ::std::optional symbolizeMatrixFormat(uint32_t value) { switch (value) { case 0: return MatrixFormat::fp8_e4m3; case 1: return MatrixFormat::fp8_e5m2; case 2: return MatrixFormat::fp6_e2m3; case 3: return MatrixFormat::fp6_e3m2; case 4: return MatrixFormat::fp4_e2m1; default: return ::std::nullopt; } } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifyPreGfx12CachePolicy(PreGfx12CachePolicy symbol) { auto val = static_cast(symbol); assert(2147483679u == (2147483679u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; // Print bit enum groups before individual bits if (23u == (23u & val)) { strs.push_back("all"); val &= ~static_cast(23); } if (1u == (1u & val)) strs.push_back("glc"); if (2u == (2u & val)) strs.push_back("slc"); if (4u == (4u & val)) strs.push_back("dlc"); if (8u == (8u & val)) strs.push_back("swz"); if (16u == (16u & val)) strs.push_back("scc"); if (2147483648u == (2147483648u & val)) strs.push_back("volatile"); return ::llvm::join(strs, "|"); } ::std::optional symbolizePreGfx12CachePolicy(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return PreGfx12CachePolicy::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint32_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("glc", 1) .Case("slc", 2) .Case("dlc", 4) .Case("swz", 8) .Case("scc", 16) .Case("all", 23) .Case("volatile", 2147483648) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizePreGfx12CachePolicy(uint32_t value) { // Special case for all bits unset. if (value == 0) return PreGfx12CachePolicy::none; if (value & ~static_cast(2147483679u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifySchedGroupMask(SchedGroupMask symbol) { auto val = static_cast(symbol); assert(4095u == (4095u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; // Print bit enum groups before individual bits if (4095u == (4095u & val)) { strs.push_back("all"); val &= ~static_cast(4095); } if (1u == (1u & val)) strs.push_back("non_mem_non_sideeffect"); if (2u == (2u & val)) strs.push_back("valu"); if (4u == (4u & val)) strs.push_back("salu"); if (8u == (8u & val)) strs.push_back("mfma_wmma"); if (16u == (16u & val)) strs.push_back("all_vmem"); if (32u == (32u & val)) strs.push_back("vmem_read"); if (64u == (64u & val)) strs.push_back("vmem_write"); if (128u == (128u & val)) strs.push_back("all_ds"); if (256u == (256u & val)) strs.push_back("ds_read"); if (512u == (512u & val)) strs.push_back("ds_write"); if (1024u == (1024u & val)) strs.push_back("transcendental"); if (2048u == (2048u & val)) strs.push_back("ldsdma"); return ::llvm::join(strs, "|"); } ::std::optional symbolizeSchedGroupMask(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return SchedGroupMask::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint32_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("non_mem_non_sideeffect", 1) .Case("valu", 2) .Case("salu", 4) .Case("mfma_wmma", 8) .Case("all_vmem", 16) .Case("vmem_read", 32) .Case("vmem_write", 64) .Case("all_ds", 128) .Case("ds_read", 256) .Case("ds_write", 512) .Case("transcendental", 1024) .Case("ldsdma", 2048) .Case("all", 4095) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizeSchedGroupMask(uint32_t value) { // Special case for all bits unset. if (value == 0) return SchedGroupMask::none; if (value & ~static_cast(4095u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { std::string stringifyWMMACModifier(WMMACModifier symbol) { auto val = static_cast(symbol); assert(3u == (3u | val) && "invalid bits set in bit enum"); // Special case for all bits unset. if (val == 0) return "none"; ::llvm::SmallVector<::llvm::StringRef, 2> strs; // Print bit enum groups before individual bits if (3u == (3u & val)) { strs.push_back("neg_abs"); val &= ~static_cast(3); } if (1u == (1u & val)) strs.push_back("neg"); if (2u == (2u & val)) strs.push_back("abs"); return ::llvm::join(strs, "|"); } ::std::optional symbolizeWMMACModifier(::llvm::StringRef str) { // Special case for all bits unset. if (str == "none") return WMMACModifier::none; ::llvm::SmallVector<::llvm::StringRef, 2> symbols; str.split(symbols, "|"); uint16_t val = 0; for (auto symbol : symbols) { auto bit = llvm::StringSwitch<::std::optional>(symbol.trim()) .Case("neg", 1) .Case("abs", 2) .Case("neg_abs", 3) .Default(::std::nullopt); if (bit) { val |= *bit; } else { return ::std::nullopt; } } return static_cast(val); } ::std::optional symbolizeWMMACModifier(uint16_t value) { // Special case for all bits unset. if (value == 0) return WMMACModifier::none; if (value & ~static_cast(3u)) return std::nullopt; return static_cast(value); } } // namespace mlir::ROCDL namespace mlir::ROCDL { ::llvm::StringRef stringifyWMMAMatrixScale(WMMAMatrixScale val) { switch (val) { case WMMAMatrixScale::row0: return "row0"; case WMMAMatrixScale::row1: return "row1"; } return ""; } ::std::optional symbolizeWMMAMatrixScale(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("row0", WMMAMatrixScale::row0) .Case("row1", WMMAMatrixScale::row1) .Default(::std::nullopt); } ::std::optional symbolizeWMMAMatrixScale(uint32_t value) { switch (value) { case 0: return WMMAMatrixScale::row0; case 1: return WMMAMatrixScale::row1; default: return ::std::nullopt; } } } // namespace mlir::ROCDL namespace mlir::ROCDL { ::llvm::StringRef stringifyWMMAMatrixScaleFormat(WMMAMatrixScaleFormat val) { switch (val) { case WMMAMatrixScaleFormat::e8: return "e8"; case WMMAMatrixScaleFormat::e5m3: return "e5m3"; case WMMAMatrixScaleFormat::e4m3: return "e4m3"; } return ""; } ::std::optional symbolizeWMMAMatrixScaleFormat(::llvm::StringRef str) { return ::llvm::StringSwitch<::std::optional>(str) .Case("e8", WMMAMatrixScaleFormat::e8) .Case("e5m3", WMMAMatrixScaleFormat::e5m3) .Case("e4m3", WMMAMatrixScaleFormat::e4m3) .Default(::std::nullopt); } ::std::optional symbolizeWMMAMatrixScaleFormat(uint32_t value) { switch (value) { case 0: return WMMAMatrixScaleFormat::e8; case 1: return WMMAMatrixScaleFormat::e5m3; case 2: return WMMAMatrixScaleFormat::e4m3; default: return ::std::nullopt; } } } // namespace mlir::ROCDL