224 lines
18 KiB
Plaintext
224 lines
18 KiB
Plaintext
List of CLB Tiles
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CLEM_X45Y493
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CLEL_R_X45Y493
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CLEM_X27Y351
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CLEL_R_X27Y351
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CLEM_X31Y375
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CLEL_R_X31Y375
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CLEM_X24Y371
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CLEL_R_X24Y371
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CLEM_X60Y458
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CLEL_R_X60Y458
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CLEM_X34Y327
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CLEL_R_X34Y327
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CLEM_X34Y464
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CLEL_R_X34Y464
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CLEM_X60Y459
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CLEL_R_X60Y459
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CLEM_X54Y463
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CLEL_R_X54Y463
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CLEM_X54Y527
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CLEL_R_X54Y527
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List of Congested Nets
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/dcache/data/rockettile_dcache_data_arrays_0_ext/pstore1_rmw_r_reg
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[21]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/stage_reg_0
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/accum_dump_i/Q[16]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/Q[0]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/cordic_atan_one_stage_i/CO[0]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/Q[2]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/Q[3]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/y_core_in_reg[31]_0[28]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/Q[1]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/y_core_in_reg[31]_0[26]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/cordic_atan_one_stage_i/y_core_in[24]_i_3__17_n_0
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/theta_core_in[6]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/theta_core_in[5]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/theta_core_in[4]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/theta_core_in[3]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/y_core_in_reg[31]_0[27]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/cordic_atan_one_stage_i/y_core_in[24]_i_5__17_n_0
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/y_core_in_reg[31]_0[24]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/accum_dump_i/O[4]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/accum_dump_i/O[0]
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/cordic_atan_one_stage_i/y_core_in[24]_i_7__17_n_0
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u_rocket/fpga_gps_domain/dev/tracking_6/i_trck_top/Disc_PLL_i/cordic_atan_one_stage_i/y_core_in[24]_i_9__17_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/dcache/data/rockettile_dcache_data_arrays_0_ext/_dataArb_io_out_bits_eccMask[4]
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u_rocket/fpga_gps_domain/dev/tracking_4/p_3_in[5]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_reg_reg[13]_0[1]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_reg_reg[7]_0
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_reg_reg[13]_0[0]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_reg_reg[13]_0[2]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_reg_reg[13]_0[4]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_reg_reg[13]_0[3]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter[0]_i_13__3_n_0
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[3]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[4]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[6]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/i___688_i_2__3_n_0
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[10]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[0]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[1]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[2]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter__0[5]
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter[13]_i_4__3_n_0
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u_rocket/fpga_gps_domain/dev/tracking_4/i_trck_top/trck_cntrl_i/code_phase_counter[6]_i_2__3_n_0
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[21]
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u_rocket/pbus/atomics/sel00
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u_rocket/pbus/atomics/cam_a_0_bits_mask[3]
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u_rocket/pbus/atomics/cam_d_0_data[32]
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u_rocket/pbus/atomics/cam_d_0_data[36]
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u_rocket/pbus/atomics/cam_d_0_data[34]
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u_rocket/pbus/atomics/cam_d_0_data[38]
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u_rocket/pbus/atomics/cam_a_0_bits_data[32]
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u_rocket/pbus/atomics/cam_a_0_bits_data[33]
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u_rocket/pbus/atomics/cam_a_0_bits_mask[4]
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u_rocket/pbus/atomics/_adder_out_T_carry__3_i_18_n_0
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u_rocket/pbus/atomics/cam_a_0_bits_data[39]
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u_rocket/pbus/atomics/cam_a_0_bits_data[31]
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u_rocket/pbus/atomics/_adder_out_T_carry__2_i_17_n_0
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[17]
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u_rocket/pbus/atomics/cam_a_0_bits_data[36]
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u_rocket/pbus/buffer_1/nodeOut_a_q/ram_ext/Memory_reg_0_1_28_41/DOG0
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u_rocket/pbus/atomics/_adder_out_T_carry__3_i_17_n_0
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u_rocket/pbus/atomics/cam_a_0_bits_data[38]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[14]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[10]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[9]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[22]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[20]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[16]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[15]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[4]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[3]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[2]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[1]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[17]
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u_rocket/fpga_gps_domain/dev/tracking_1/shift_reg_resultant_60[1]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[8]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[5]
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u_rocket/fpga_gps_domain/dev/tracking_1/shift_reg_p_reg_n_0_[40]
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u_rocket/fpga_gps_domain/dev/tracking_1/p_1_in[7]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[16]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[18]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[19]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[20]
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u_rocket/fpga_gps_domain/dev/tracking_1/shift_reg_p_reg_n_0_[42]
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u_rocket/fpga_gps_domain/dev/tracking_1/shift_reg_p_reg_n_0_[23]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[15]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[12]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[11]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[14]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[13]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[10]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[9]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[8]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_0[7]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_3[3]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/lock_detector_i/cos2x_i/i_p_o_reg[14]_0[0]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[16]_0[0]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/lock_detector_i/cos2x_i/i_p_o_reg[14]_0[7]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_3[4]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_3[5]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/lock_detector_i/cos2x_i/i_p_o_reg[15]_0[6]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_3[6]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/lock_detector_i/cos2x_i/i_p_o_reg[14][0]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[15]_1[4]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[15]_1[5]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_3[0]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[17]_3[1]
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u_rocket/fpga_gps_domain/dev/tracking_7/i_trck_top/accum_dump_i/i_p_o_reg[4]_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[25]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[27]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in1[3]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in1[2]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[46]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[47]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[44]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[36]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[40]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[38]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[35]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[41]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[39]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/_fpiu_io_out_bits_in_in1[37]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/ex_ra_1_reg_n_0_[2]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/ex_ra_0_reg_n_0_[1]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/ex_ra_2_reg_n_0_[2]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/load_wb_typeTag_reg[0]_1
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/load_wb_data_reg[62][26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in2[37]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in2[38]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in2[44]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in2[41]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in2[31]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/fpiu/io_out_bits_in_in2[30]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/_mulAddRecFNToRaw_preMul_io_toPostMul_CDom_CAlignDist[0]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/_mulAddRecFNToRaw_preMul_io_toPostMul_CDom_CAlignDist[2]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_CDom_CAlignDist[3]_i_1_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_CDom_CAlignDist[1]_i_1_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/_mulAddRecFNToRaw_preMul_io_toPostMul_CDom_CAlignDist[4]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_highAlignedSigC[54]_i_3_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_highAlignedSigC[44]_i_4_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_highAlignedSigC[50]_i_7_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_bit0AlignedSigC_i_2_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_fromPreMul_pipe_b_highAlignedSigC[20]_i_4_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[55]_i_24_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[55]_i_26_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[95]_i_41_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[55]_i_28_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[63]_i_37_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[55]_i_32_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[71]_i_40_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/in_in3[50]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_23_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_25_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b_reg[47]_i_2_n_8
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_21_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b_reg[55]_i_2_n_14
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_22_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b_reg[55]_i_2_n_15
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_19_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_20_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b_reg[55]_i_2_n_13
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b[47]_i_18_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b_reg[55]_i_2_n_11
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/dfma/fma/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b_reg[55]_i_2_n_9
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/ex_ra_2_reg[0]_rep__0_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/ex_ra_2_reg[1]_rep__0_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/divSqrt_1/divSqrtRecFNToRaw/divSqrtRawFN/divSqrt_waddr_reg[2]_11
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/divSqrt_1/divSqrtRecFNToRaw/divSqrtRawFN/Memory[28][64]_i_4_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/load_wb_tag_reg[2]_28
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/load_wb_tag_reg[3]_2
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/load_wb_tag_reg[2]_24
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/divSqrt_1/divSqrtRecFNToRaw/divSqrtRawFN/Memory[12][64]_i_2_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[11][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[10][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[9][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[8][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[14][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[6][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[5][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[4][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[3][64]_0[33]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[0][64]_0[33]
|
|
u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/divSqrt_1/divSqrtRecFNToRaw/divSqrtRawFN/Memory[30][33]_i_3_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b1_i_21_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/mulAddRecFNToRaw_postMul_io_mulAddResult_pipe_b1_i_22_n_0
|
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/divSqrt_1/divSqrtRecFNToRaw/divSqrtRawFN/Memory[30][27]_i_6_n_0
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[31][64]_0[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[28][64]_0[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[27][64]_0[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[24][64]_0[26]
|
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/divSqrt_waddr_reg[3]_72
|
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/divSqrt_waddr_reg[3]_71
|
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[23][64]_0[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[22][64]_0[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[17][64]_0[26]
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u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/regfile_ext/Memory_reg[16][64]_0[26]
|
|
u_rocket/tile_prci_domain/element_reset_domain/rockettile/fpuOpt/divSqrt_1/divSqrtRecFNToRaw/divSqrtRawFN/Memory[28][26]_i_2_n_0
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