258 lines
9.3 KiB
C++
258 lines
9.3 KiB
C++
//===- MIParser.h - Machine Instructions Parser -----------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file declares the function that parses the machine instructions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_MIRPARSER_MIPARSER_H
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#define LLVM_CODEGEN_MIRPARSER_MIPARSER_H
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/ADT/StringMap.h"
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#include "llvm/CodeGen/MachineMemOperand.h"
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#include "llvm/CodeGen/Register.h"
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#include "llvm/IR/TrackingMDRef.h"
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#include "llvm/Support/Allocator.h"
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#include "llvm/Support/SMLoc.h"
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#include "llvm/Support/UniqueBBID.h"
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#include <map>
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#include <utility>
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namespace llvm {
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class MachineBasicBlock;
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class MachineFunction;
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class MDNode;
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class RegisterBank;
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struct SlotMapping;
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class SMDiagnostic;
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class SourceMgr;
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class StringRef;
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class TargetRegisterClass;
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class TargetSubtargetInfo;
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struct VRegInfo {
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enum : uint8_t { UNKNOWN, NORMAL, GENERIC, REGBANK } Kind = UNKNOWN;
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bool Explicit = false; ///< VReg was explicitly specified in the .mir file.
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union {
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const TargetRegisterClass *RC;
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const RegisterBank *RegBank;
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} D;
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Register VReg;
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Register PreferredReg;
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uint8_t Flags = 0;
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};
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using Name2RegClassMap = StringMap<const TargetRegisterClass *>;
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using Name2RegBankMap = StringMap<const RegisterBank *>;
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struct PerTargetMIParsingState {
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private:
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const TargetSubtargetInfo &Subtarget;
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/// Maps from instruction names to op codes.
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StringMap<unsigned> Names2InstrOpCodes;
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/// Maps from register names to registers.
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StringMap<Register> Names2Regs;
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/// Maps from register mask names to register masks.
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StringMap<const uint32_t *> Names2RegMasks;
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/// Maps from subregister names to subregister indices.
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StringMap<unsigned> Names2SubRegIndices;
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/// Maps from target index names to target indices.
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StringMap<int> Names2TargetIndices;
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/// Maps from direct target flag names to the direct target flag values.
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StringMap<unsigned> Names2DirectTargetFlags;
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/// Maps from direct target flag names to the bitmask target flag values.
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StringMap<unsigned> Names2BitmaskTargetFlags;
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/// Maps from MMO target flag names to MMO target flag values.
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StringMap<MachineMemOperand::Flags> Names2MMOTargetFlags;
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/// Maps from register class names to register classes.
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Name2RegClassMap Names2RegClasses;
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/// Maps from register bank names to register banks.
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Name2RegBankMap Names2RegBanks;
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void initNames2InstrOpCodes();
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void initNames2Regs();
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void initNames2RegMasks();
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void initNames2SubRegIndices();
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void initNames2TargetIndices();
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void initNames2DirectTargetFlags();
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void initNames2BitmaskTargetFlags();
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void initNames2MMOTargetFlags();
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LLVM_ABI void initNames2RegClasses();
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LLVM_ABI void initNames2RegBanks();
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public:
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/// Try to convert an instruction name to an opcode. Return true if the
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/// instruction name is invalid.
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LLVM_ABI bool parseInstrName(StringRef InstrName, unsigned &OpCode);
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/// Try to convert a register name to a register number. Return true if the
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/// register name is invalid.
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LLVM_ABI bool getRegisterByName(StringRef RegName, Register &Reg);
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/// Check if the given identifier is a name of a register mask.
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///
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/// Return null if the identifier isn't a register mask.
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LLVM_ABI const uint32_t *getRegMask(StringRef Identifier);
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/// Check if the given identifier is a name of a subregister index.
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///
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/// Return 0 if the name isn't a subregister index class.
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LLVM_ABI unsigned getSubRegIndex(StringRef Name);
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/// Try to convert a name of target index to the corresponding target index.
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///
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/// Return true if the name isn't a name of a target index.
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LLVM_ABI bool getTargetIndex(StringRef Name, int &Index);
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/// Try to convert a name of a direct target flag to the corresponding
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/// target flag.
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///
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/// Return true if the name isn't a name of a direct flag.
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LLVM_ABI bool getDirectTargetFlag(StringRef Name, unsigned &Flag);
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/// Try to convert a name of a bitmask target flag to the corresponding
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/// target flag.
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///
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/// Return true if the name isn't a name of a bitmask target flag.
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LLVM_ABI bool getBitmaskTargetFlag(StringRef Name, unsigned &Flag);
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/// Try to convert a name of a MachineMemOperand target flag to the
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/// corresponding target flag.
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///
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/// Return true if the name isn't a name of a target MMO flag.
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LLVM_ABI bool getMMOTargetFlag(StringRef Name,
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MachineMemOperand::Flags &Flag);
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/// Check if the given identifier is a name of a register class.
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///
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/// Return null if the name isn't a register class.
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LLVM_ABI const TargetRegisterClass *getRegClass(StringRef Name);
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/// Check if the given identifier is a name of a register bank.
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///
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/// Return null if the name isn't a register bank.
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LLVM_ABI const RegisterBank *getRegBank(StringRef Name);
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LLVM_ABI bool getVRegFlagValue(StringRef FlagName, uint8_t &FlagValue) const;
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PerTargetMIParsingState(const TargetSubtargetInfo &STI)
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: Subtarget(STI) {
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initNames2RegClasses();
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initNames2RegBanks();
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}
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~PerTargetMIParsingState() = default;
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LLVM_ABI void setTarget(const TargetSubtargetInfo &NewSubtarget);
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};
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struct PerFunctionMIParsingState {
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BumpPtrAllocator Allocator;
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MachineFunction &MF;
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SourceMgr *SM;
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const SlotMapping &IRSlots;
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PerTargetMIParsingState &Target;
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std::map<unsigned, TrackingMDNodeRef> MachineMetadataNodes;
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std::map<unsigned, std::pair<TempMDTuple, SMLoc>> MachineForwardRefMDNodes;
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DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
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DenseMap<Register, VRegInfo *> VRegInfos;
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StringMap<VRegInfo *> VRegInfosNamed;
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DenseMap<unsigned, int> FixedStackObjectSlots;
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DenseMap<unsigned, int> StackObjectSlots;
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DenseMap<unsigned, unsigned> ConstantPoolSlots;
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DenseMap<unsigned, unsigned> JumpTableSlots;
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/// Maps from slot numbers to function's unnamed values.
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DenseMap<unsigned, const Value *> Slots2Values;
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LLVM_ABI PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM,
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const SlotMapping &IRSlots,
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PerTargetMIParsingState &Target);
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LLVM_ABI VRegInfo &getVRegInfo(Register Num);
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LLVM_ABI VRegInfo &getVRegInfoNamed(StringRef RegName);
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LLVM_ABI const Value *getIRValue(unsigned Slot);
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};
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/// Parse the machine basic block definitions, and skip the machine
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/// instructions.
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///
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/// This function runs the first parsing pass on the machine function's body.
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/// It parses only the machine basic block definitions and creates the machine
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/// basic blocks in the given machine function.
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///
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/// The machine instructions aren't parsed during the first pass because all
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/// the machine basic blocks aren't defined yet - this makes it impossible to
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/// resolve the machine basic block references.
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///
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/// Return true if an error occurred.
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LLVM_ABI bool parseMachineBasicBlockDefinitions(PerFunctionMIParsingState &PFS,
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StringRef Src,
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SMDiagnostic &Error);
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/// Parse the machine instructions.
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///
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/// This function runs the second parsing pass on the machine function's body.
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/// It skips the machine basic block definitions and parses only the machine
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/// instructions and basic block attributes like liveins and successors.
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///
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/// The second parsing pass assumes that the first parsing pass already ran
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/// on the given source string.
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///
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/// Return true if an error occurred.
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LLVM_ABI bool parseMachineInstructions(PerFunctionMIParsingState &PFS,
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StringRef Src, SMDiagnostic &Error);
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LLVM_ABI bool parseMBBReference(PerFunctionMIParsingState &PFS,
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MachineBasicBlock *&MBB, StringRef Src,
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SMDiagnostic &Error);
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LLVM_ABI bool parseRegisterReference(PerFunctionMIParsingState &PFS,
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Register &Reg, StringRef Src,
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SMDiagnostic &Error);
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LLVM_ABI bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS,
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Register &Reg, StringRef Src,
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SMDiagnostic &Error);
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LLVM_ABI bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS,
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VRegInfo *&Info, StringRef Src,
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SMDiagnostic &Error);
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LLVM_ABI bool parseStackObjectReference(PerFunctionMIParsingState &PFS, int &FI,
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StringRef Src, SMDiagnostic &Error);
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LLVM_ABI bool parsePrefetchTarget(PerFunctionMIParsingState &PFS,
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CallsiteID &Target, StringRef Src,
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SMDiagnostic &Error);
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LLVM_ABI bool parseMDNode(PerFunctionMIParsingState &PFS, MDNode *&Node,
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StringRef Src, SMDiagnostic &Error);
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LLVM_ABI bool parseMachineMetadata(PerFunctionMIParsingState &PFS,
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StringRef Src, SMRange SourceRange,
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SMDiagnostic &Error);
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} // end namespace llvm
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#endif // LLVM_CODEGEN_MIRPARSER_MIPARSER_H
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