143 lines
5.4 KiB
C++
143 lines
5.4 KiB
C++
//===- Utils.h - MLIR ROCDL target utils ------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This files declares ROCDL target related utility classes and functions.
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_TARGET_LLVM_ROCDL_UTILS_H
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#define MLIR_TARGET_LLVM_ROCDL_UTILS_H
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#include "mlir/Dialect/GPU/IR/CompilationInterfaces.h"
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#include "mlir/Dialect/GPU/IR/GPUDialect.h"
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#include "mlir/Dialect/LLVMIR/ROCDLDialect.h"
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#include "mlir/IR/Attributes.h"
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#include "mlir/Support/LLVM.h"
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#include "mlir/Target/LLVM/ModuleToObject.h"
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#include "llvm/ADT/BitmaskEnum.h"
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namespace mlir {
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namespace ROCDL {
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/// Searches & returns the path ROCM toolkit path, the search order is:
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/// 1. The `ROCM_PATH` environment variable.
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/// 2. The `ROCM_ROOT` environment variable.
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/// 3. The `ROCM_HOME` environment variable.
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/// 4. The ROCM path detected by CMake.
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/// 5. Returns an empty string.
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StringRef getROCMPath();
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/// Helper enum for specifying the AMD GCN device libraries required for
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/// compilation.
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enum class AMDGCNLibraries : uint32_t {
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None = 0,
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Ockl = 1,
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Ocml = 2,
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OpenCL = 4,
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Hip = 8,
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LastLib = Hip,
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LLVM_MARK_AS_BITMASK_ENUM(LastLib),
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All = (LastLib << 1) - 1
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};
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LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE();
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/// Assembles ISA to an object code.
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FailureOr<SmallVector<char, 0>>
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assembleIsa(StringRef isa, StringRef targetTriple, StringRef chip,
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StringRef features, function_ref<InFlightDiagnostic()> emitError);
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FailureOr<SmallVector<char, 0>>
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linkObjectCode(ArrayRef<char> objectCode, StringRef lldPath,
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function_ref<InFlightDiagnostic()> emitError);
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/// Base class for all ROCDL serializations from GPU modules into binary
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/// strings. By default this class serializes into LLVM bitcode.
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class SerializeGPUModuleBase : public LLVM::ModuleToObject {
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public:
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/// Initializes the `toolkitPath` with the path in `targetOptions` or if empty
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/// with the path in `getROCMPath`.
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SerializeGPUModuleBase(Operation &module, ROCDLTargetAttr target,
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const gpu::TargetOptions &targetOptions = {});
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/// Initializes the LLVM AMDGPU target by safely calling
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/// `LLVMInitializeAMDGPU*` methods if available.
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static void init();
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/// Returns the target attribute.
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ROCDLTargetAttr getTarget() const;
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/// Returns the ROCM toolkit path.
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StringRef getToolkitPath() const;
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/// Returns the LLVM bitcode libraries to be linked.
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ArrayRef<Attribute> getLibrariesToLink() const;
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/// Appends standard ROCm device libraries to `fileList`.
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LogicalResult appendStandardLibs(AMDGCNLibraries libs);
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/// Loads the bitcode files in `fileList`.
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virtual std::optional<SmallVector<std::unique_ptr<llvm::Module>>>
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loadBitcodeFiles(llvm::Module &module) override;
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/// Determines required Device Libraries and adds `oclc` control variables to
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/// the LLVM Module if needed. Also sets
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/// `amdhsa_code_object_version` module flag.
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void handleModulePreLink(llvm::Module &module) override;
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/// Removes unnecessary metadata from the loaded bitcode files.
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LogicalResult handleBitcodeFile(llvm::Module &module) override;
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protected:
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/// Adds `oclc` control variables to the LLVM Module if needed. It also sets
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/// `amdhsa_code_object_version` module flag which is equal to ABI version and
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/// it uses "llvm::Module::Error" to set that flag.
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void addControlVariables(llvm::Module &module, AMDGCNLibraries libs,
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bool wave64, bool daz, bool finiteOnly,
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bool unsafeMath, bool fastMath, bool correctSqrt,
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StringRef abiVer);
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/// Compiles assembly to a binary.
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virtual FailureOr<SmallVector<char, 0>>
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compileToBinary(StringRef serializedISA);
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/// Default implementation of `ModuleToObject::moduleToObject`.
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FailureOr<SmallVector<char, 0>>
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moduleToObjectImpl(const gpu::TargetOptions &targetOptions,
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llvm::Module &llvmModule);
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/// ROCDL target attribute.
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ROCDLTargetAttr target;
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/// ROCM toolkit path.
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std::string toolkitPath;
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/// List of LLVM bitcode files to link to.
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SmallVector<Attribute> librariesToLink;
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/// AMD GCN libraries to use when linking, the default is using none.
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AMDGCNLibraries deviceLibs = AMDGCNLibraries::None;
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};
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/// Returns a map containing the `amdhsa.kernels` ELF metadata for each of the
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/// kernels in the binary, or `std::nullopt` if the metadata couldn't be
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/// retrieved. The map associates the name of the kernel with the list of named
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/// attributes found in `amdhsa.kernels`. For more information on the ELF
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/// metadata see: https://llvm.org/docs/AMDGPUUsage.html#amdhsa
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std::optional<DenseMap<StringAttr, NamedAttrList>>
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getAMDHSAKernelsELFMetadata(Builder &builder, ArrayRef<char> elfData);
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/// Returns a `#gpu.kernel_table` containing kernel metadata for each of the
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/// kernels in `gpuModule`. If `elfData` is valid, then the `amdhsa.kernels` ELF
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/// metadata will be added to the `#gpu.kernel_table`.
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gpu::KernelTableAttr getKernelMetadata(Operation *gpuModule,
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ArrayRef<char> elfData = {});
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} // namespace ROCDL
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} // namespace mlir
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#endif // MLIR_TARGET_LLVM_ROCDL_UTILS_H
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