Files
gps/targets/fpga/genesys2/out/logs/program_flash.log
T
2026-07-12 11:01:51 +03:00

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#-----------------------------------------------------------
# Vivado v2025.2 (64-bit)
# SW Build 6299465 on Fri Nov 14 12:34:56 MST 2025
# IP Build 6300035 on Fri Nov 14 10:48:45 MST 2025
# SharedData Build 6298862 on Thu Nov 13 04:50:51 MST 2025
# Start of session at: Sat Jul 11 00:16:17 2026
# Process ID : 90546
# Current directory : /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/out/logs
# Command line : vivado -mode batch -log /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/out/logs/program_flash.log -journal /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/out/logs/program_flash.jou -source /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/flow/vivado/scripts/program_flash.tcl
# Log file : /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/out/logs/program_flash.log
# Journal file : /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/out/logs/program_flash.jou
# Running On : onur
# Platform : Ubuntu
# Operating System : Ubuntu 22.04.5 LTS
# Processor Detail : AMD Ryzen 7 7800X3D 8-Core Processor
# CPU Frequency : 4199.910 MHz
# CPU Physical cores : 12
# CPU Logical cores : 12
# Host memory : 22112 MB
# Swap memory : 2147 MB
# Total Virtual : 24260 MB
# Available Virtual : 20462 MB
#-----------------------------------------------------------
Sourcing tcl script '/home/onur/.Xilinx/Vivado/Vivado_init.tcl'
Configured Digilent board repo: /home/onur/.local/share/digilent-vivado-boards/new/board_files
source /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/flow/vivado/scripts/program_flash.tcl
# set script_dir [file dirname [file normalize [info script]]]
# set fpga_dir [file normalize [file join $script_dir ../..]]
# proc getenv_default {name default} {
# if {[info exists ::env($name)] && $::env($name) ne ""} {
# return $::env($name)
# }
# return $default
# }
# set mcs_file [file normalize [getenv_default FLASH_MCS [file join $fpga_dir out flash genesys2_rocket.mcs]]]
# set cfgmem_part [getenv_default CFGMEM_PART s25fl256sxxxxxx0-spi-x1_x2_x4]
# set device_pattern [getenv_default HW_DEVICE_PATTERN xc7k325t*]
# set flash_verify [getenv_default FLASH_VERIFY 0]
# set flash_erase [getenv_default FLASH_ERASE 1]
# set flash_region_names [split [getenv_default FLASH_REGION_NAMES "combined"] ";"]
# set flash_region_files_env [getenv_default FLASH_REGION_FILES ""]
# if {$flash_region_files_env eq ""} {
# set flash_region_files [list $mcs_file]
# } else {
# set flash_region_files [split $flash_region_files_env ";"]
# }
# if {[llength $flash_region_names] != [llength $flash_region_files]} {
# error "FLASH_REGION_NAMES and FLASH_REGION_FILES length mismatch"
# }
# foreach region_file $flash_region_files {
# if {![file exists $region_file]} {
# error "MCS file not found: $region_file"
# }
# }
# open_hw_manager
# connect_hw_server
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-3415] Connecting to cs_server url TCP:localhost:0
INFO: [Labtools 27-3417] Launching cs_server...
INFO: [Labtools 27-2221] Launch Output:
******** Xilinx cs_server v2025.2.0
****** Build date : Nov 14 2025-02:16:52
**** Build number : 2025.2.1763075812
** Copyright 2017-2022 Xilinx, Inc. All Rights Reserved.
** Copyright 2022-2026 Advanced Micro Devices, Inc. All Rights Reserved.
# open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/200300BB2D80B
# set dev [lindex [get_hw_devices $device_pattern] 0]
# if {$dev eq ""} {
# error "No hardware device found matching $device_pattern"
# }
# current_hw_device $dev
# refresh_hw_device $dev
INFO: [Labtools 27-2302] Device xc7k325t (JTAG device index = 0) is programmed with a design that has 1 SPI core(s).
# set cfg_parts [get_cfgmem_parts $cfgmem_part]
# if {[llength $cfg_parts] == 0} {
# error "Configuration memory part not found: $cfgmem_part"
# }
# create_hw_cfgmem -hw_device $dev [lindex $cfg_parts 0]
# set cfgmem [current_hw_cfgmem]
# set_property PROGRAM.ADDRESS_RANGE {use_file} $cfgmem
# set_property PROGRAM.BLANK_CHECK 0 $cfgmem
# set_property PROGRAM.ERASE $flash_erase $cfgmem
# set_property PROGRAM.CFG_PROGRAM 1 $cfgmem
# set_property PROGRAM.VERIFY $flash_verify $cfgmem
# set_property PROGRAM.UNUSED_PIN_TERMINATION {pull-none} $cfgmem
# create_hw_bitstream -hw_device $dev [get_property PROGRAM.HW_CFGMEM_BITFILE $dev]
# program_hw_devices $dev
INFO: [Labtools 27-3164] End of startup status: HIGH
# refresh_hw_device $dev
INFO: [Labtools 27-2302] Device xc7k325t (JTAG device index = 0) is programmed with a design that has 1 SPI core(s).
# for {set i 0} {$i < [llength $flash_region_files]} {incr i} {
# set region_name [lindex $flash_region_names $i]
# set region_file [lindex $flash_region_files $i]
# puts "Programming flash region '$region_name' from $region_file"
# set_property PROGRAM.FILES [list $region_file] $cfgmem
# program_hw_cfgmem $cfgmem
# }
Programming flash region 'app' from /home/onur/Desktop/rocket/rocket-chip/targets/fpga/genesys2/out/flash/regions/app.mcs
Mfg ID : 1 Memory Type : 2 Memory Capacity : 19 Device ID 1 : 0 Device ID 2 : 0
Performing Erase Operation...
Erase Operation successful.
Performing Program Operation...
Program Operation successful.
INFO: [Labtoolstcl 44-377] Flash programming completed successfully
# puts "Programmed flash $cfgmem_part"
Programmed flash s25fl256sxxxxxx0-spi-x1_x2_x4
# close_hw_manager
INFO: [Common 17-206] Exiting Vivado at Sat Jul 11 00:16:29 2026...