21 lines
454 B
Makefile
21 lines
454 B
Makefile
TARGET := steval_mki217v1_test
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APP_SRCS := \
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main.c \
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src/lsm6dsox.c
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BSP_SRCS := init.c uart.c plic.c irq.c pmod_spi.c
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# Genesys2 fabric/UART and CLINT defaults. Top-level board builds may override.
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BSP_UART_CLOCK_HZ ?= 50000000
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BSP_CLINT_TIMEBASE_HZ ?= 500000
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LSM6DSOX_ODR_HZ ?= 104
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CAPTURE_DURATION_S ?= 60
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include ../common/app.mk
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CFLAGS += -Iheader
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CFLAGS += -DLSM6DSOX_ODR_HZ=$(LSM6DSOX_ODR_HZ) \
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-DCAPTURE_DURATION_S=$(CAPTURE_DURATION_S)
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