404 lines
16 KiB
C++
404 lines
16 KiB
C++
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|* *|
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|* Enum Utility Declarations *|
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|* *|
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|* Automatically generated file, do not edit! *|
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|* From: AMDGPUEnums.td *|
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|* *|
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\*===----------------------------------------------------------------------===*/
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namespace mlir::amdgpu {
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// AMDGPU-specific address spaces
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enum class AddressSpace : uint32_t {
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FatRawBuffer = 0,
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BufferRsrc = 1,
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FatStructuredBuffer = 2,
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};
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::std::optional<AddressSpace> symbolizeAddressSpace(uint32_t);
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::llvm::StringRef stringifyAddressSpace(AddressSpace);
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::std::optional<AddressSpace> symbolizeAddressSpace(::llvm::StringRef);
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inline constexpr unsigned getMaxEnumValForAddressSpace() {
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return 2;
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}
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inline ::llvm::StringRef stringifyEnum(AddressSpace enumValue) {
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return stringifyAddressSpace(enumValue);
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}
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template <typename EnumType>
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::std::optional<EnumType> symbolizeEnum(::llvm::StringRef);
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template <>
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inline ::std::optional<AddressSpace> symbolizeEnum<AddressSpace>(::llvm::StringRef str) {
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return symbolizeAddressSpace(str);
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}
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} // namespace mlir::amdgpu
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namespace mlir {
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template <typename T, typename>
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struct FieldParser;
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template<>
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struct FieldParser<::mlir::amdgpu::AddressSpace, ::mlir::amdgpu::AddressSpace> {
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template <typename ParserT>
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static FailureOr<::mlir::amdgpu::AddressSpace> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword)))
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return parser.emitError(loc, "expected keyword for AMDGPU-specific address spaces");
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::AddressSpace> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::AddressSpace>(enumKeyword))
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return *attr;
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return parser.emitError(loc, "expected one of [fat_raw_buffer, buffer_rsrc, fat_structured_buffer] for AMDGPU-specific address spaces, got: ") << enumKeyword;
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}
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};
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/// Support for std::optional, useful in attribute/type definition where the enum is
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/// used as:
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///
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/// let parameters = (ins OptionalParameter<"std::optional<TheEnumName>">:$value);
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template<>
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struct FieldParser<std::optional<::mlir::amdgpu::AddressSpace>, std::optional<::mlir::amdgpu::AddressSpace>> {
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template <typename ParserT>
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static FailureOr<std::optional<::mlir::amdgpu::AddressSpace>> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword, {"fat_raw_buffer", "buffer_rsrc", "fat_structured_buffer"})))
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return std::optional<::mlir::amdgpu::AddressSpace>{};
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::AddressSpace> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::AddressSpace>(enumKeyword))
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return attr;
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return parser.emitError(loc, "expected one of [fat_raw_buffer, buffer_rsrc, fat_structured_buffer] for AMDGPU-specific address spaces, got: ") << enumKeyword;
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}
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};
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} // namespace mlir
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namespace llvm {
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inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::mlir::amdgpu::AddressSpace value) {
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auto valueStr = stringifyEnum(value);
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return p << valueStr;
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}
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} // namespace llvm
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namespace llvm {
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template<> struct DenseMapInfo<::mlir::amdgpu::AddressSpace> {
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using StorageInfo = ::llvm::DenseMapInfo<uint32_t>;
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static unsigned getHashValue(const ::mlir::amdgpu::AddressSpace &val) {
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return StorageInfo::getHashValue(static_cast<uint32_t>(val));
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}
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static bool isEqual(const ::mlir::amdgpu::AddressSpace &lhs, const ::mlir::amdgpu::AddressSpace &rhs) {
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return lhs == rhs;
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}
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};
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}
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namespace mlir::amdgpu {
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// AMDGPU-specific cache scopes. WGP - workgroup processor (CUs); SE - shader engine (GL2); DEV - device; SYS - system
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enum class Scope : uint32_t {
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WGP = 0,
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SE = 1,
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DEV = 2,
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SYS = 3,
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};
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::std::optional<Scope> symbolizeScope(uint32_t);
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::llvm::StringRef stringifyScope(Scope);
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::std::optional<Scope> symbolizeScope(::llvm::StringRef);
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inline constexpr unsigned getMaxEnumValForScope() {
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return 3;
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}
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inline ::llvm::StringRef stringifyEnum(Scope enumValue) {
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return stringifyScope(enumValue);
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}
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template <typename EnumType>
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::std::optional<EnumType> symbolizeEnum(::llvm::StringRef);
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template <>
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inline ::std::optional<Scope> symbolizeEnum<Scope>(::llvm::StringRef str) {
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return symbolizeScope(str);
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}
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} // namespace mlir::amdgpu
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namespace mlir {
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template <typename T, typename>
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struct FieldParser;
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template<>
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struct FieldParser<::mlir::amdgpu::Scope, ::mlir::amdgpu::Scope> {
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template <typename ParserT>
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static FailureOr<::mlir::amdgpu::Scope> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword)))
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return parser.emitError(loc, "expected keyword for AMDGPU-specific cache scopes. WGP - workgroup processor (CUs); SE - shader engine (GL2); DEV - device; SYS - system");
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::Scope> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::Scope>(enumKeyword))
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return *attr;
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return parser.emitError(loc, "expected one of [WGP, SE, DEV, SYS] for AMDGPU-specific cache scopes. WGP - workgroup processor (CUs); SE - shader engine (GL2); DEV - device; SYS - system, got: ") << enumKeyword;
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}
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};
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/// Support for std::optional, useful in attribute/type definition where the enum is
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/// used as:
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///
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/// let parameters = (ins OptionalParameter<"std::optional<TheEnumName>">:$value);
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template<>
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struct FieldParser<std::optional<::mlir::amdgpu::Scope>, std::optional<::mlir::amdgpu::Scope>> {
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template <typename ParserT>
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static FailureOr<std::optional<::mlir::amdgpu::Scope>> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword, {"WGP", "SE", "DEV", "SYS"})))
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return std::optional<::mlir::amdgpu::Scope>{};
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::Scope> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::Scope>(enumKeyword))
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return attr;
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return parser.emitError(loc, "expected one of [WGP, SE, DEV, SYS] for AMDGPU-specific cache scopes. WGP - workgroup processor (CUs); SE - shader engine (GL2); DEV - device; SYS - system, got: ") << enumKeyword;
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}
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};
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} // namespace mlir
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namespace llvm {
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inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::mlir::amdgpu::Scope value) {
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auto valueStr = stringifyEnum(value);
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return p << valueStr;
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}
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} // namespace llvm
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namespace llvm {
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template<> struct DenseMapInfo<::mlir::amdgpu::Scope> {
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using StorageInfo = ::llvm::DenseMapInfo<uint32_t>;
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static unsigned getHashValue(const ::mlir::amdgpu::Scope &val) {
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return StorageInfo::getHashValue(static_cast<uint32_t>(val));
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}
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static bool isEqual(const ::mlir::amdgpu::Scope &lhs, const ::mlir::amdgpu::Scope &rhs) {
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return lhs == rhs;
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}
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};
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}
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namespace mlir::amdgpu {
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// The possible permutations for a DPP operation
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enum class DPPPerm : uint32_t {
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quad_perm = 0,
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row_shl = 1,
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row_shr = 2,
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row_ror = 3,
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wave_shl = 4,
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wave_shr = 5,
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wave_ror = 6,
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wave_rol = 7,
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row_mirror = 8,
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row_half_mirror = 9,
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row_bcast_15 = 10,
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row_bcast_31 = 11,
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};
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::std::optional<DPPPerm> symbolizeDPPPerm(uint32_t);
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::llvm::StringRef stringifyDPPPerm(DPPPerm);
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::std::optional<DPPPerm> symbolizeDPPPerm(::llvm::StringRef);
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inline constexpr unsigned getMaxEnumValForDPPPerm() {
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return 11;
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}
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inline ::llvm::StringRef stringifyEnum(DPPPerm enumValue) {
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return stringifyDPPPerm(enumValue);
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}
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template <typename EnumType>
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::std::optional<EnumType> symbolizeEnum(::llvm::StringRef);
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template <>
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inline ::std::optional<DPPPerm> symbolizeEnum<DPPPerm>(::llvm::StringRef str) {
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return symbolizeDPPPerm(str);
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}
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} // namespace mlir::amdgpu
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namespace mlir {
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template <typename T, typename>
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struct FieldParser;
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template<>
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struct FieldParser<::mlir::amdgpu::DPPPerm, ::mlir::amdgpu::DPPPerm> {
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template <typename ParserT>
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static FailureOr<::mlir::amdgpu::DPPPerm> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword)))
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return parser.emitError(loc, "expected keyword for The possible permutations for a DPP operation");
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::DPPPerm> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::DPPPerm>(enumKeyword))
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return *attr;
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return parser.emitError(loc, "expected one of [quad_perm, row_shl, row_shr, row_ror, wave_shl, wave_shr, wave_ror, wave_rol, row_mirror, row_half_mirror, row_bcast_15, row_bcast_31] for The possible permutations for a DPP operation, got: ") << enumKeyword;
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}
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};
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/// Support for std::optional, useful in attribute/type definition where the enum is
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/// used as:
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///
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/// let parameters = (ins OptionalParameter<"std::optional<TheEnumName>">:$value);
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template<>
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struct FieldParser<std::optional<::mlir::amdgpu::DPPPerm>, std::optional<::mlir::amdgpu::DPPPerm>> {
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template <typename ParserT>
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static FailureOr<std::optional<::mlir::amdgpu::DPPPerm>> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword, {"quad_perm", "row_shl", "row_shr", "row_ror", "wave_shl", "wave_shr", "wave_ror", "wave_rol", "row_mirror", "row_half_mirror", "row_bcast_15", "row_bcast_31"})))
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return std::optional<::mlir::amdgpu::DPPPerm>{};
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::DPPPerm> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::DPPPerm>(enumKeyword))
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return attr;
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return parser.emitError(loc, "expected one of [quad_perm, row_shl, row_shr, row_ror, wave_shl, wave_shr, wave_ror, wave_rol, row_mirror, row_half_mirror, row_bcast_15, row_bcast_31] for The possible permutations for a DPP operation, got: ") << enumKeyword;
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}
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};
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} // namespace mlir
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namespace llvm {
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inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::mlir::amdgpu::DPPPerm value) {
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auto valueStr = stringifyEnum(value);
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return p << valueStr;
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}
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} // namespace llvm
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namespace llvm {
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template<> struct DenseMapInfo<::mlir::amdgpu::DPPPerm> {
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using StorageInfo = ::llvm::DenseMapInfo<uint32_t>;
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static unsigned getHashValue(const ::mlir::amdgpu::DPPPerm &val) {
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return StorageInfo::getHashValue(static_cast<uint32_t>(val));
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}
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static bool isEqual(const ::mlir::amdgpu::DPPPerm &lhs, const ::mlir::amdgpu::DPPPerm &rhs) {
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return lhs == rhs;
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}
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};
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}
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namespace mlir::amdgpu {
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// AMDGPU-specific prefetch temporal hints for load instructions. RT - regular temporal for both near and far caches; NT - non-temporal for both near and far caches; HT - high-priority temporal for both near and far caches; LU - last-use; NT_RT - non-temporal for near cache(s) and regular for far caches; RT_NT - regular for near cache(s) and non-temporal for far caches; NT_HT - non-temporal for near cache(s) and high-priority temporal for far caches
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enum class LoadTemporalHint : uint32_t {
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RT = 0,
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NT = 1,
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HT = 2,
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LU = 3,
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NT_RT = 4,
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RT_NT = 5,
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NT_HT = 6,
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};
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::std::optional<LoadTemporalHint> symbolizeLoadTemporalHint(uint32_t);
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::llvm::StringRef stringifyLoadTemporalHint(LoadTemporalHint);
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::std::optional<LoadTemporalHint> symbolizeLoadTemporalHint(::llvm::StringRef);
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inline constexpr unsigned getMaxEnumValForLoadTemporalHint() {
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return 6;
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}
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inline ::llvm::StringRef stringifyEnum(LoadTemporalHint enumValue) {
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return stringifyLoadTemporalHint(enumValue);
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}
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template <typename EnumType>
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::std::optional<EnumType> symbolizeEnum(::llvm::StringRef);
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template <>
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inline ::std::optional<LoadTemporalHint> symbolizeEnum<LoadTemporalHint>(::llvm::StringRef str) {
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return symbolizeLoadTemporalHint(str);
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}
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} // namespace mlir::amdgpu
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namespace mlir {
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template <typename T, typename>
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struct FieldParser;
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template<>
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struct FieldParser<::mlir::amdgpu::LoadTemporalHint, ::mlir::amdgpu::LoadTemporalHint> {
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template <typename ParserT>
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static FailureOr<::mlir::amdgpu::LoadTemporalHint> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword)))
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return parser.emitError(loc, "expected keyword for AMDGPU-specific prefetch temporal hints for load instructions. RT - regular temporal for both near and far caches; NT - non-temporal for both near and far caches; HT - high-priority temporal for both near and far caches; LU - last-use; NT_RT - non-temporal for near cache(s) and regular for far caches; RT_NT - regular for near cache(s) and non-temporal for far caches; NT_HT - non-temporal for near cache(s) and high-priority temporal for far caches");
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::LoadTemporalHint> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::LoadTemporalHint>(enumKeyword))
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return *attr;
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return parser.emitError(loc, "expected one of [RT, NT, HT, LU, NT_RT, RT_NT, NT_HT] for AMDGPU-specific prefetch temporal hints for load instructions. RT - regular temporal for both near and far caches; NT - non-temporal for both near and far caches; HT - high-priority temporal for both near and far caches; LU - last-use; NT_RT - non-temporal for near cache(s) and regular for far caches; RT_NT - regular for near cache(s) and non-temporal for far caches; NT_HT - non-temporal for near cache(s) and high-priority temporal for far caches, got: ") << enumKeyword;
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}
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};
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/// Support for std::optional, useful in attribute/type definition where the enum is
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/// used as:
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///
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/// let parameters = (ins OptionalParameter<"std::optional<TheEnumName>">:$value);
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template<>
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struct FieldParser<std::optional<::mlir::amdgpu::LoadTemporalHint>, std::optional<::mlir::amdgpu::LoadTemporalHint>> {
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template <typename ParserT>
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static FailureOr<std::optional<::mlir::amdgpu::LoadTemporalHint>> parse(ParserT &parser) {
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// Parse the keyword/string containing the enum.
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std::string enumKeyword;
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auto loc = parser.getCurrentLocation();
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if (failed(parser.parseOptionalKeywordOrString(&enumKeyword, {"RT", "NT", "HT", "LU", "NT_RT", "RT_NT", "NT_HT"})))
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return std::optional<::mlir::amdgpu::LoadTemporalHint>{};
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// Symbolize the keyword.
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if (::std::optional<::mlir::amdgpu::LoadTemporalHint> attr = ::mlir::amdgpu::symbolizeEnum<::mlir::amdgpu::LoadTemporalHint>(enumKeyword))
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return attr;
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return parser.emitError(loc, "expected one of [RT, NT, HT, LU, NT_RT, RT_NT, NT_HT] for AMDGPU-specific prefetch temporal hints for load instructions. RT - regular temporal for both near and far caches; NT - non-temporal for both near and far caches; HT - high-priority temporal for both near and far caches; LU - last-use; NT_RT - non-temporal for near cache(s) and regular for far caches; RT_NT - regular for near cache(s) and non-temporal for far caches; NT_HT - non-temporal for near cache(s) and high-priority temporal for far caches, got: ") << enumKeyword;
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}
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};
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} // namespace mlir
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namespace llvm {
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inline ::llvm::raw_ostream &operator<<(::llvm::raw_ostream &p, ::mlir::amdgpu::LoadTemporalHint value) {
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auto valueStr = stringifyEnum(value);
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return p << valueStr;
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}
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} // namespace llvm
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namespace llvm {
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template<> struct DenseMapInfo<::mlir::amdgpu::LoadTemporalHint> {
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using StorageInfo = ::llvm::DenseMapInfo<uint32_t>;
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static unsigned getHashValue(const ::mlir::amdgpu::LoadTemporalHint &val) {
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return StorageInfo::getHashValue(static_cast<uint32_t>(val));
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}
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static bool isEqual(const ::mlir::amdgpu::LoadTemporalHint &lhs, const ::mlir::amdgpu::LoadTemporalHint &rhs) {
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return lhs == rhs;
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}
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};
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}
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