198 lines
8.0 KiB
TableGen
198 lines
8.0 KiB
TableGen
//===- ArithBase.td - Base defs for arith dialect -----------*- tablegen -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARITH_BASE
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#define ARITH_BASE
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include "mlir/IR/EnumAttr.td"
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include "mlir/IR/OpBase.td"
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def Arith_Dialect : Dialect {
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let name = "arith";
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let cppNamespace = "::mlir::arith";
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let description = [{
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The arith dialect is intended to hold basic integer and floating point
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mathematical operations. This includes unary, binary, and ternary arithmetic
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ops, bitwise and shift ops, cast ops, and compare ops. Operations in this
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dialect also accept vectors and tensors of integers or floats. The dialect
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assumes integers are represented by bitvectors with a two's complement
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representation. Unless otherwise stated, the operations within this dialect
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propagate poison values, i.e., if any of its inputs are poison, then the
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output is poison. Unless otherwise stated, operations applied to `vector`
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and `tensor` values propagates poison elementwise.
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Manipulating value with type `i0` isn't supported in this dialect at the
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moment and is considered invalid. This can change in the future if some
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motivating use-cases are presented.
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Some floating-point operations may specify rounding modes and/or fast-math
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flags. In the absence of an explicit rounding mode, the arith dialect uses
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this default round mode for internal purposes such as constant folding and
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canonicalization: round-to-nearest, ties-to-even. The runtime behavior of
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operations without an explicit rounding mode is deferred to the target
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backend and may differ from the default arith rounding mode.
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}];
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let hasConstantMaterializer = 1;
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let useDefaultAttributePrinterParser = 1;
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}
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// The predicate indicates the type of the comparison to perform:
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// (un)orderedness, (in)equality and less/greater than (or equal to) as
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// well as predicates that are always true or false.
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def Arith_CmpFPredicateAttr : I64EnumAttr<
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"CmpFPredicate", "",
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[
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I64EnumAttrCase<"AlwaysFalse", 0, "false">,
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I64EnumAttrCase<"OEQ", 1, "oeq">,
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I64EnumAttrCase<"OGT", 2, "ogt">,
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I64EnumAttrCase<"OGE", 3, "oge">,
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I64EnumAttrCase<"OLT", 4, "olt">,
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I64EnumAttrCase<"OLE", 5, "ole">,
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I64EnumAttrCase<"ONE", 6, "one">,
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I64EnumAttrCase<"ORD", 7, "ord">,
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I64EnumAttrCase<"UEQ", 8, "ueq">,
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I64EnumAttrCase<"UGT", 9, "ugt">,
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I64EnumAttrCase<"UGE", 10, "uge">,
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I64EnumAttrCase<"ULT", 11, "ult">,
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I64EnumAttrCase<"ULE", 12, "ule">,
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I64EnumAttrCase<"UNE", 13, "une">,
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I64EnumAttrCase<"UNO", 14, "uno">,
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I64EnumAttrCase<"AlwaysTrue", 15, "true">,
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]> {
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let cppNamespace = "::mlir::arith";
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}
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def Arith_CmpIPredicateAttr : I64EnumAttr<
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"CmpIPredicate", "",
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[
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I64EnumAttrCase<"eq", 0>,
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I64EnumAttrCase<"ne", 1>,
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I64EnumAttrCase<"slt", 2>,
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I64EnumAttrCase<"sle", 3>,
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I64EnumAttrCase<"sgt", 4>,
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I64EnumAttrCase<"sge", 5>,
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I64EnumAttrCase<"ult", 6>,
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I64EnumAttrCase<"ule", 7>,
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I64EnumAttrCase<"ugt", 8>,
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I64EnumAttrCase<"uge", 9>,
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]> {
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let cppNamespace = "::mlir::arith";
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}
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def ATOMIC_RMW_KIND_ADDF : I64EnumAttrCase<"addf", 0>;
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def ATOMIC_RMW_KIND_ADDI : I64EnumAttrCase<"addi", 1>;
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def ATOMIC_RMW_KIND_ANDI : I64EnumAttrCase<"andi", 2>;
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def ATOMIC_RMW_KIND_ASSIGN : I64EnumAttrCase<"assign", 3>;
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def ATOMIC_RMW_KIND_MAXIMUMF : I64EnumAttrCase<"maximumf", 4>;
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def ATOMIC_RMW_KIND_MAXNUMF : I64EnumAttrCase<"maxnumf", 5>;
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def ATOMIC_RMW_KIND_MAXS : I64EnumAttrCase<"maxs", 6>;
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def ATOMIC_RMW_KIND_MAXU : I64EnumAttrCase<"maxu", 7>;
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def ATOMIC_RMW_KIND_MINIMUMF : I64EnumAttrCase<"minimumf", 8>;
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def ATOMIC_RMW_KIND_MINNUMF : I64EnumAttrCase<"minnumf", 9>;
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def ATOMIC_RMW_KIND_MINS : I64EnumAttrCase<"mins", 10>;
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def ATOMIC_RMW_KIND_MINU : I64EnumAttrCase<"minu", 11>;
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def ATOMIC_RMW_KIND_MULF : I64EnumAttrCase<"mulf", 12>;
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def ATOMIC_RMW_KIND_MULI : I64EnumAttrCase<"muli", 13>;
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def ATOMIC_RMW_KIND_ORI : I64EnumAttrCase<"ori", 14>;
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def ATOMIC_RMW_KIND_XORI : I64EnumAttrCase<"xori", 15>;
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def AtomicRMWKindAttr : I64EnumAttr<
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"AtomicRMWKind", "",
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[ATOMIC_RMW_KIND_ADDF, ATOMIC_RMW_KIND_ADDI, ATOMIC_RMW_KIND_ANDI,
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ATOMIC_RMW_KIND_ASSIGN, ATOMIC_RMW_KIND_MAXIMUMF, ATOMIC_RMW_KIND_MAXNUMF,
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ATOMIC_RMW_KIND_MAXS, ATOMIC_RMW_KIND_MAXU, ATOMIC_RMW_KIND_MINIMUMF,
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ATOMIC_RMW_KIND_MINNUMF, ATOMIC_RMW_KIND_MINS, ATOMIC_RMW_KIND_MINU,
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ATOMIC_RMW_KIND_MULF, ATOMIC_RMW_KIND_MULI, ATOMIC_RMW_KIND_ORI,
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ATOMIC_RMW_KIND_XORI]> {
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let cppNamespace = "::mlir::arith";
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}
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def FASTMATH_NONE : I32BitEnumAttrCaseNone<"none" >;
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def FASTMATH_REASSOC : I32BitEnumAttrCaseBit<"reassoc", 0>;
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def FASTMATH_NO_NANS : I32BitEnumAttrCaseBit<"nnan", 1>;
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def FASTMATH_NO_INFS : I32BitEnumAttrCaseBit<"ninf", 2>;
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def FASTMATH_NO_SIGNED_ZEROS : I32BitEnumAttrCaseBit<"nsz", 3>;
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def FASTMATH_ALLOW_RECIP : I32BitEnumAttrCaseBit<"arcp", 4>;
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def FASTMATH_ALLOW_CONTRACT : I32BitEnumAttrCaseBit<"contract", 5>;
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def FASTMATH_APPROX_FUNC : I32BitEnumAttrCaseBit<"afn", 6>;
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def FASTMATH_FAST : I32BitEnumAttrCaseGroup<
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"fast",
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[
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FASTMATH_REASSOC, FASTMATH_NO_NANS, FASTMATH_NO_INFS,
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FASTMATH_NO_SIGNED_ZEROS, FASTMATH_ALLOW_RECIP, FASTMATH_ALLOW_CONTRACT,
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FASTMATH_APPROX_FUNC]>;
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def FastMathFlags : I32BitEnumAttr<
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"FastMathFlags",
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"Floating point fast math flags",
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[
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FASTMATH_NONE, FASTMATH_REASSOC, FASTMATH_NO_NANS,
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FASTMATH_NO_INFS, FASTMATH_NO_SIGNED_ZEROS, FASTMATH_ALLOW_RECIP,
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FASTMATH_ALLOW_CONTRACT, FASTMATH_APPROX_FUNC, FASTMATH_FAST]> {
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let separator = ",";
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let cppNamespace = "::mlir::arith";
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let genSpecializedAttr = 0;
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let printBitEnumPrimaryGroups = 1;
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}
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def Arith_FastMathAttr :
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EnumAttr<Arith_Dialect, FastMathFlags, "fastmath"> {
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let assemblyFormat = "`<` $value `>`";
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}
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//===----------------------------------------------------------------------===//
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// Arith_IntegerOverflowFlags
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//===----------------------------------------------------------------------===//
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def Arith_IOFnone : I32BitEnumAttrCaseNone<"none">;
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def Arith_IOFnsw : I32BitEnumAttrCaseBit<"nsw", 0>;
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def Arith_IOFnuw : I32BitEnumAttrCaseBit<"nuw", 1>;
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def Arith_IntegerOverflowFlags : I32BitEnumAttr<
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"IntegerOverflowFlags",
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"Integer overflow arith flags",
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[Arith_IOFnone, Arith_IOFnsw, Arith_IOFnuw]> {
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let separator = ", ";
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let cppNamespace = "::mlir::arith";
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let genSpecializedAttr = 0;
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let printBitEnumPrimaryGroups = 1;
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}
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def Arith_IntegerOverflowAttr :
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EnumAttr<Arith_Dialect, Arith_IntegerOverflowFlags, "overflow"> {
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let assemblyFormat = "`<` $value `>`";
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}
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//===----------------------------------------------------------------------===//
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// Arith_RoundingMode
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//===----------------------------------------------------------------------===//
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// These correspond to LLVM's values defined in:
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// llvm/include/llvm/ADT/FloatingPointMode.h
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def Arith_RToNearestTiesToEven // Round to nearest, ties to even
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: I32EnumAttrCase<"to_nearest_even", 0>;
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def Arith_RDownward // Round toward -inf
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: I32EnumAttrCase<"downward", 1>;
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def Arith_RUpward // Round toward +inf
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: I32EnumAttrCase<"upward", 2>;
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def Arith_RTowardZero // Round toward 0
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: I32EnumAttrCase<"toward_zero", 3>;
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def Arith_RToNearestTiesAwayFromZero // Round to nearest, ties away from zero
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: I32EnumAttrCase<"to_nearest_away", 4>;
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def Arith_RoundingModeAttr : I32EnumAttr<
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"RoundingMode", "Floating point rounding mode",
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[Arith_RToNearestTiesToEven, Arith_RDownward, Arith_RUpward,
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Arith_RTowardZero, Arith_RToNearestTiesAwayFromZero]> {
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let cppNamespace = "::mlir::arith";
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}
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#endif // ARITH_BASE
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