853 lines
38 KiB
C++
853 lines
38 KiB
C++
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|* *|
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|* AttrDef Declarations *|
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|* *|
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|* Automatically generated file, do not edit! *|
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|* *|
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\*===----------------------------------------------------------------------===*/
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#ifdef GET_ATTRDEF_CLASSES
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#undef GET_ATTRDEF_CLASSES
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namespace mlir {
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class AsmParser;
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class AsmPrinter;
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} // namespace mlir
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namespace mlir::gpu {
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/// GPU address space
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class AddressSpaceAttr;
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/// barrier execution scope
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/// Enum cases:
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/// * subgroup (`Subgroup`)
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/// * workgroup (`Workgroup`)
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/// * cluster (`Cluster`)
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class BarrierScopeAttr;
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/// a dimension, either 'x', 'y', or 'z'
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class DimensionAttr;
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/// GPU attribute for storing metadata related to a compiled kernel. The
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/// attribute contains the name and arguments type of the kernel.
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///
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/// The attribute also contains optional parameters for storing the arguments
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/// attributes as well as a dictionary for additional metadata, like occupancy
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/// information or other function attributes.
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///
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/// Note: The `arg_attrs` parameter is expected to follow all the constraints
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/// imposed by the `mlir::FunctionOpInterface` interface.
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///
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/// Examples:
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/// ```mlir
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/// #gpu.kernel_metadata<@kernel1, (i32) -> (), arg_attrs = [...], metadata = {reg_count = 255, ...}>
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/// #gpu.kernel_metadata<@kernel2, (i32, f64) -> ()>
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/// ```
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class KernelMetadataAttr;
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/// GPU attribute representing a list of `#gpu.kernel_metadata` attributes. This
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/// attribute supports searching kernels by name. All kernels in the table must
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/// have an unique name.
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///
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/// Examples:
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/// ```mlir
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/// // Empty table.
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/// #gpu.kernel_table<>
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///
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/// // Table with a single kernel.
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/// #gpu.kernel_table<[#gpu.kernel_metadata<kernel0, () -> () >]>
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///
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/// // Table with multiple kernels.
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/// #gpu.kernel_table<[
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/// #gpu.kernel_metadata<"kernel0", (i32, f32) -> (), metadata = {sgpr_count = 255}>,
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/// #gpu.kernel_metadata<"kernel1", (i32) -> ()>
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/// ]>
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/// ```
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class KernelTableAttr;
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/// A GPU object attribute glues together a GPU target, the object kind, a
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/// binary string with the object, the object properties, and kernel metadata,
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/// encapsulating how the object was generated and its properties with the
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/// object itself.
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///
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/// There are four object formats:
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/// 1. `Offload`: represents generic objects not described by the other three
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/// formats, and its meaning is target-dependent. For example, on the NVPTX and
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/// AMDGPU targets, this format is associated with LLVM bitcode.
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/// 2. `Assembly`: represents GPU assembly code. For example, in the NVPTX
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/// target, assembly is PTX code, which can be JITted at runtime.
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/// 3. `Binary`: represents executable code for a GPU single architecture. For
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/// example, PTX code that was compiled for a specific compute capability. Note
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/// that this format is likely to throw an error if there is an architecture
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/// mismatch between the compiled and running architecture.
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/// 4. `Fatbin`: represents a GPU fat binary with executable code for multiple
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/// architectures. This format is the default; thus, it gets elided inassembly
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/// code.
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///
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/// Object properties are specified through the `properties` dictionary
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/// attribute and can be used to define additional information.
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///
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/// Kernel metadata is specified through the `kernels` parameter, and can be
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/// used to specify additional information on a kernel by kernel basis.
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///
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/// The target attribute must implement or promise the `TargetAttrInterface`
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/// interface.
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///
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/// ```
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/// #gpu.object<#rocdl.target, offload = "..."> // An offload object.
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/// #gpu.object<#nvvm.target, properties = {O = 3 : i32}, assembly = "..."> // An assembly object with additional properties.
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/// #gpu.object<#rocdl.target, bin = "..."> // A binary object.
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/// #gpu.object<#nvvm.target, "..."> // A fatbin object.
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/// #gpu.object<#nvvm.target, kernels = #gpu.kernel_table<...>, "..."> // An object with a kernel table.
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/// ```
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class ObjectAttr;
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/// This GPU offloading handler selects a single GPU object for embedding. The
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/// object is selected based on the `target` parameter, this parameter can be
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/// either a number -i.e. selects the ith-target, or the target itself -i.e.
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/// searches for the specified target in the object array.
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///
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/// The first object in a `gpu.binary` operation is selected if no target is
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/// specified.
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class SelectObjectAttr;
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/// An attribute that allows defining thread block parallelism for GPU devices.
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///
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/// Thread blocks (aka workgroup) are grouped into a grid described by a
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/// 3-dimensional rectangle.
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/// This attribute indicates that thread block parallelism is desired.
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/// It can be consumed by lowering to generate GPU code.
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/// 2 modes are supported: (1) 3D mapping mode and (2) linear mapping mode.
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///
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/// #### 3D mapping mode
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///
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/// The 3D block id is simply the 3D index of the block `(bidx, bidy, bidz)`.
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/// If required, predication occurs on a per-dimension basis. This allows
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/// specifying predication on a 3D sub-rectangle of the grid.
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///
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/// #### Linear mapping mode
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///
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/// The linear block id is obtained by linearizing the index of the block.
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/// If required, predication occurs on the linear id. This allows specifying
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/// predication on a 1D subset of the (linearized) grid.
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///
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/// For instance, if the basis is denoted as (GX, GY, GZ) and the block id is
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/// denoted by (bx, by, bz), the block id is:
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/// `linear_id = bx + by * GX + bz * GX * GBY)`.
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/// The linear block id is fixed for the duration of a GPU kernel.
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///
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/// This linear id mapping attribute indicates a different linearization relation
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/// is applied locally to a loop nest.
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///
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/// For instance, if the new basis is denoted as (LBD0, LBD1, LBD2, LBD3) the
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/// block id in the new basis is:
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/// ```(linear_id mod LBD0 ,
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/// (linear_id / LBD0) mod * LBD1,
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/// (linear_id / (LBD0 * LBD1)) mod LBD2,
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/// (linear_id / (LBD0 * LBD1 * LBD2)) mod LBD3)```.
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/// This reinterpretation is only fixed for the duration of a loop nest.
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class GPUBlockMappingAttr;
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/// An attribute that allows defining warpgroup parallelism for GPU devices.
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///
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/// Threads of proper granularity (e.g. multiple of
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/// "kNumWarpsPerGroup * kWarpSize" on CUDA devices) can be grouped into
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/// warpgroups described by a 3-dimensional rectangle.
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/// This attribute indicates that warpgroup parallelism is desired.
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/// It can be consumed by lowering to generate GPU code.
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/// 2 modes are supported: (1) 3D mapping mode and (2) linear mapping mode.
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///
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/// #### 3D mapping mode
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///
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/// The 3D warpgroup id is simply the adjusted 3D index of the thread
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/// `(tidx / (kNumWarpsPerGroup * kWarpSize), tidy, tidz)`.
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/// If required, predication occurs on a per-dimension basis. This allows
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/// specifying predication on a 3D sub-rectangle of the warpgroups.
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///
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/// #### Linear mapping mode
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///
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/// The linear warpgroup id is obtained by linearizing the index of the warpgroup.
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/// If required, predication occurs on the linear id. This allows specifying
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/// predication on a 1D "kNumWarpsPerGroup * kWarpSize"-aligned subset of the
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/// (linearized) block.
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///
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/// For instance, if the basis is denoted as (BX, BY, BZ) and the thread id is
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/// id is denoted by (tx, ty, tz), the linear warpgroup id is:
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/// ```linear_id = (tx + ty * BX + tz * BX * BY)
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/// / (kNumWarpsPerGroup * kWarpSize)```.
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/// The linear warpgroup id is fixed for the duration of a GPU kernel.
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///
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/// This linear id mapping attribute indicates a different linearization relation
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/// is applied locally to a loop nest.
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///
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/// For instance, if the new basis is denoted as (LWGD0, LWGD1, LWGD2, LWGD3) the
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/// warpgroup id in the new basis is:
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/// ```(linear_id mod LWGD0 ,
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/// (linear_id / LWGD0) mod * LWGD1,
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/// (linear_id / (LWGD0 * LWGD1)) mod LWGD2,
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/// (linear_id / (LWGD0 * LWGD1 * LWGD2)) mod LWGD3)```.
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/// This reinterpretation is only fixed for the duration of a loop nest.
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class GPUWarpgroupMappingAttr;
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/// An attribute that allows defining warp parallelism for GPU devices.
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///
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/// Threads of proper granularity (e.g. multiple of "warp size" on CUDA devices)
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/// can be grouped into warps described by a 3-dimensional rectangle.
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/// This attribute indicates that warp parallelism is desired.
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/// It can be consumed by lowering to generate GPU code.
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/// 2 modes are supported: (1) 3D mapping mode and (2) linear mapping mode.
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///
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/// #### 3D mapping mode
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///
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/// The 3D warp id is simply the adjusted 3D index of the thread
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/// `(tidx / kWarpSize, tidy, tidz)`.
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/// If required, predication occurs on a per-dimension basis. This allows
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/// specifying predication on a 3D sub-rectangle of the warpgroups.
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///
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/// #### Linear mapping mode
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///
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/// The linear warp id is obtained by linearizing the index of the warp.
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/// If required, predication occurs on the linear id. This allows specifying
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/// predication on a 1D "kWarpSize"-aligned subset of the (linearized) block.
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///
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/// For instance, if the basis is denoted as (BX, BY, BZ) and the thread id is
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/// id is denoted by (tx, ty, tz), the linear warp id is:
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/// `linear_id = (tx + ty * BX + tz * BX * BY) / kWarpSize`.
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/// The linear warp id is fixed for the duration of a GPU kernel.
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///
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/// This linear id mapping attribute indicates a different linearization relation
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/// is applied locally to a loop nest.
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///
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/// For instance, if the new basis is denoted as (LWD0, LWD1, LWD2, LWD3) the
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/// warp id in the new basis is:
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/// ```(linear_id mod LWD0 ,
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/// (linear_id / LWD0) mod * LWD1,
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/// (linear_id / (LWD0 * LWD1)) mod LWD2,
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/// (linear_id / (LWD0 * LWD1 * LWD2)) mod LWD3)```.
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/// This reinterpretation is only fixed for the duration of a loop nest.
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class GPUWarpMappingAttr;
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/// An attribute that allows defining thread parallelism for GPU devices.
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///
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/// Thread (aka work item) are grouped into a thread blocks described by a
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/// 3-dimensional rectangle.
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/// This attribute indicates that thread parallelism is desired.
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/// It can be consumed by lowering to generate GPU.
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///
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/// #### 3D mapping mode
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///
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/// The 3D thread id is simply the 3D index of the thread `(tidx, tidy, tidz)`.
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/// If required, predication occurs on a per-dimension basis. This allows
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/// specifying predication on a 3D sub-rectangle of the block.
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///
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/// #### Linear mapping mode
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///
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/// The linear thread id is obtained by linearizing the index of the thread.
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/// If required, predication occurs on the linear id. This allows specifying
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/// predication on a 1D subset of the (linearized) block.
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///
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/// For instance, if the basis is denoted as (BX, BY, BZ) and the thread id is
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/// id is denoted by (tx, ty, tz), the linear thread id is:
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/// ```linear_id = (tx + ty * BX + tz * BX * BY)```.
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/// The linear thread id is fixed for the duration of a GPU kernel.
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///
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/// This linear id mapping attribute indicates a different linearization relation
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/// is applied locally to a loop nest.
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///
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/// For instance, if the new basis is denoted as (LTD0, LTD1, LTD2, LTD3) the
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/// thread id in the new basis is:
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/// ```(linear_id mod LTD0 ,
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/// (linear_id / LTD0) mod * LTD1,
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/// (linear_id / (LTD0 * LTD1)) mod LTD2,
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/// (linear_id / (LTD0 * LTD1 * LTD2)) mod LTD3)```.
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/// This reinterpretation is only fixed for the duration of a loop nest.
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class GPUThreadMappingAttr;
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/// An attribute that allows defining lane parallelism for GPU devices.
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///
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/// It can be consumed by lowering to generate GPU.
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///
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/// #### 3D mapping mode
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///
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/// Unsupported
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///
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/// #### Linear mapping mode
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///
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/// The linear lane id is obtained by linearizing the index of the lane.
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/// If required, predication occurs on the linear id. This allows specifying
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/// predication on a 1D subset of the (linearized) lanes.
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class GPULaneMappingAttr;
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/// Attribute describing how to filter the processing units that a region is
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/// mapped to. The masking is a bitfield that specifies for each processing
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/// unit whether it is active or not.
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class GPUMappingMaskAttr;
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/// An attribute that allows defining memory hierarchy for GPU devices.
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///
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/// GPU Memory has three memory space, global, workgroup, and private. The global memory
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/// is visible to all workitems and workgroups, the workgroup memory is only available for workitems
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/// within a workgroup, and private memory is only visible to a single workitem. This attribute indicates
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/// that using memory hiearchy is desired. It can be consumed by lowering to
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/// move data to a specific address space in GPU code.
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class GPUMemorySpaceMappingAttr;
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class ParallelLoopDimMappingAttr;
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/// built-in reduction operations supported by gpu.allreduce.
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class AllReduceOperationAttr;
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/// Indexing modes supported by gpu.shuffle.
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class ShuffleModeAttr;
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/// elementwise operation to apply to mma matrix
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class MMAElementwiseOpAttr;
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/// pruning strategy for 2:4 sparse matrix
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class Prune2To4SpMatFlagAttr;
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/// transpose mode of sparse matrix supported by sparse tensor ops
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class TransposeModeAttr;
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/// choose whether spgemm_work_estimation_or_compute does work estimation or compute
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class SpGEMMWorkEstimationOrComputeKindAttr;
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/// a lane to broadcast from
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class BroadcastTypeAttr;
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namespace detail {
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struct AddressSpaceAttrStorage;
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} // namespace detail
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class AddressSpaceAttr : public ::mlir::Attribute::AttrBase<AddressSpaceAttr, ::mlir::Attribute, detail::AddressSpaceAttrStorage> {
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public:
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using Base::Base;
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static constexpr ::llvm::StringLiteral name = "gpu.address_space";
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static constexpr ::llvm::StringLiteral dialectName = "gpu";
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static AddressSpaceAttr get(::mlir::MLIRContext *context, ::mlir::gpu::AddressSpace value);
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static constexpr ::llvm::StringLiteral getMnemonic() {
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return {"address_space"};
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}
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static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
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void print(::mlir::AsmPrinter &odsPrinter) const;
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::mlir::gpu::AddressSpace getValue() const;
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};
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namespace detail {
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struct BarrierScopeAttrStorage;
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} // namespace detail
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class BarrierScopeAttr : public ::mlir::Attribute::AttrBase<BarrierScopeAttr, ::mlir::Attribute, detail::BarrierScopeAttrStorage> {
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public:
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using Base::Base;
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static constexpr ::llvm::StringLiteral name = "gpu.barrier_scope";
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static constexpr ::llvm::StringLiteral dialectName = "gpu";
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static BarrierScopeAttr get(::mlir::MLIRContext *context, ::mlir::gpu::BarrierScope value);
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static constexpr ::llvm::StringLiteral getMnemonic() {
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return {"barrier_scope"};
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}
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static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
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void print(::mlir::AsmPrinter &odsPrinter) const;
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::mlir::gpu::BarrierScope getValue() const;
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};
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namespace detail {
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struct DimensionAttrStorage;
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} // namespace detail
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class DimensionAttr : public ::mlir::Attribute::AttrBase<DimensionAttr, ::mlir::Attribute, detail::DimensionAttrStorage> {
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public:
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using Base::Base;
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static constexpr ::llvm::StringLiteral name = "gpu.dim";
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static constexpr ::llvm::StringLiteral dialectName = "gpu";
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static DimensionAttr get(::mlir::MLIRContext *context, ::mlir::gpu::Dimension value);
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static constexpr ::llvm::StringLiteral getMnemonic() {
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return {"dim"};
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}
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static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
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void print(::mlir::AsmPrinter &odsPrinter) const;
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::mlir::gpu::Dimension getValue() const;
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};
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namespace detail {
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struct KernelMetadataAttrStorage;
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} // namespace detail
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class KernelMetadataAttr : public ::mlir::Attribute::AttrBase<KernelMetadataAttr, ::mlir::Attribute, detail::KernelMetadataAttrStorage> {
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public:
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using Base::Base;
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/// Compare two kernels based on the name.
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bool operator<(const KernelMetadataAttr& other) const {
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return getName().getValue() < other.getName().getValue();
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}
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/// Returns the metadata attribute corresponding to `key` or `nullptr`
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/// if missing.
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Attribute getAttr(StringRef key) const {
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DictionaryAttr attrs = getMetadata();
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return attrs ? attrs.get(key) : nullptr;
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}
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template <typename ConcreteAttr>
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ConcreteAttr getAttr(StringRef key) const {
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return llvm::dyn_cast_or_null<ConcreteAttr>(getAttr(key));
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}
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Attribute getAttr(StringAttr key) const {
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DictionaryAttr attrs = getMetadata();
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return attrs ? attrs.get(key) : nullptr;
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}
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template <typename ConcreteAttr>
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ConcreteAttr getAttr(StringAttr key) const {
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return llvm::dyn_cast_or_null<ConcreteAttr>(getAttr(key));
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}
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/// Returns the attribute dictionary at position `index`.
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DictionaryAttr getArgAttrDict(unsigned index) {
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ArrayAttr argArray = getArgAttrs();
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return argArray ? llvm::cast<DictionaryAttr>(argArray[index]) : nullptr;
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}
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/// Return the specified attribute, if present, for the argument at 'index',
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/// null otherwise.
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Attribute getArgAttr(unsigned index, StringAttr name) {
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DictionaryAttr argDict = getArgAttrDict(index);
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return argDict ? argDict.get(name) : nullptr;
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}
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Attribute getArgAttr(unsigned index, StringRef name) {
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DictionaryAttr argDict = getArgAttrDict(index);
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return argDict ? argDict.get(name) : nullptr;
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}
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/// Returns a new KernelMetadataAttr that contains `attrs` in the metadata dictionary.
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KernelMetadataAttr appendMetadata(ArrayRef<NamedAttribute> attrs) const;
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static constexpr ::llvm::StringLiteral name = "gpu.kernel_metadata";
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static constexpr ::llvm::StringLiteral dialectName = "gpu";
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using Base::getChecked;
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static KernelMetadataAttr get(::mlir::MLIRContext *context, StringAttr name, Type function_type, ArrayAttr arg_attrs, DictionaryAttr metadata);
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static KernelMetadataAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, ::mlir::MLIRContext *context, StringAttr name, Type function_type, ArrayAttr arg_attrs, DictionaryAttr metadata);
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static KernelMetadataAttr get(StringAttr name, Type functionType, ArrayAttr argAttrs = nullptr, DictionaryAttr metadata = nullptr);
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static KernelMetadataAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, StringAttr name, Type functionType, ArrayAttr argAttrs = nullptr, DictionaryAttr metadata = nullptr);
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static KernelMetadataAttr get(FunctionOpInterface kernel, DictionaryAttr metadata = nullptr);
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static KernelMetadataAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, FunctionOpInterface kernel, DictionaryAttr metadata = nullptr);
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static ::llvm::LogicalResult verify(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, StringAttr name, Type function_type, ArrayAttr arg_attrs, DictionaryAttr metadata);
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static ::llvm::LogicalResult verifyInvariants(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, StringAttr name, Type function_type, ArrayAttr arg_attrs, DictionaryAttr metadata);
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static constexpr ::llvm::StringLiteral getMnemonic() {
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return {"kernel_metadata"};
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}
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static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
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void print(::mlir::AsmPrinter &odsPrinter) const;
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StringAttr getName() const;
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Type getFunctionType() const;
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ArrayAttr getArgAttrs() const;
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DictionaryAttr getMetadata() const;
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};
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namespace detail {
|
|
|
|
struct KernelTableAttrStorage;
|
|
|
|
} // namespace detail
|
|
class KernelTableAttr : public ::mlir::Attribute::AttrBase<KernelTableAttr, ::mlir::Attribute, detail::KernelTableAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
llvm::ArrayRef<KernelMetadataAttr>::iterator begin() const {
|
|
return getKernelTable().begin();
|
|
}
|
|
llvm::ArrayRef<KernelMetadataAttr>::iterator end() const {
|
|
return getKernelTable().end();
|
|
}
|
|
size_t size() const {
|
|
return getKernelTable().size();
|
|
}
|
|
bool empty() const {
|
|
return getKernelTable().empty();
|
|
}
|
|
|
|
/// Returns the kernel with name `key` or `nullptr` if not present.
|
|
KernelMetadataAttr lookup(StringRef key) const;
|
|
KernelMetadataAttr lookup(StringAttr key) const;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.kernel_table";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
using Base::getChecked;
|
|
static KernelTableAttr get(::mlir::MLIRContext *context, ArrayRef<KernelMetadataAttr> kernels, bool isSorted = false);
|
|
static KernelTableAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, ::mlir::MLIRContext *context, ArrayRef<KernelMetadataAttr> kernels, bool isSorted = false);
|
|
static ::llvm::LogicalResult verify(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, ::llvm::ArrayRef<KernelMetadataAttr> kernel_table);
|
|
static ::llvm::LogicalResult verifyInvariants(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, ::llvm::ArrayRef<KernelMetadataAttr> kernel_table);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"kernel_table"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::llvm::ArrayRef<KernelMetadataAttr> getKernelTable() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct ObjectAttrStorage;
|
|
|
|
} // namespace detail
|
|
class ObjectAttr : public ::mlir::Attribute::AttrBase<ObjectAttr, ::mlir::Attribute, detail::ObjectAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.object";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
using Base::getChecked;
|
|
static ObjectAttr get(::mlir::MLIRContext *context, Attribute target, CompilationTarget format, StringAttr object, DictionaryAttr properties, KernelTableAttr kernels);
|
|
static ObjectAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, ::mlir::MLIRContext *context, Attribute target, CompilationTarget format, StringAttr object, DictionaryAttr properties, KernelTableAttr kernels);
|
|
static ObjectAttr get(Attribute target, CompilationTarget format, StringAttr object, DictionaryAttr properties = nullptr, KernelTableAttr kernels = nullptr);
|
|
static ObjectAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, Attribute target, CompilationTarget format, StringAttr object, DictionaryAttr properties = nullptr, KernelTableAttr kernels = nullptr);
|
|
static ::llvm::LogicalResult verify(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, Attribute target, CompilationTarget format, StringAttr object, DictionaryAttr properties, KernelTableAttr kernels);
|
|
static ::llvm::LogicalResult verifyInvariants(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, Attribute target, CompilationTarget format, StringAttr object, DictionaryAttr properties, KernelTableAttr kernels);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"object"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
Attribute getTarget() const;
|
|
CompilationTarget getFormat() const;
|
|
StringAttr getObject() const;
|
|
DictionaryAttr getProperties() const;
|
|
KernelTableAttr getKernels() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct SelectObjectAttrStorage;
|
|
|
|
} // namespace detail
|
|
class SelectObjectAttr : public ::mlir::Attribute::AttrBase<SelectObjectAttr, ::mlir::Attribute, detail::SelectObjectAttrStorage, ::mlir::gpu::OffloadingTranslationAttrTrait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.select_object";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
using Base::getChecked;
|
|
static SelectObjectAttr get(::mlir::MLIRContext *context, Attribute target);
|
|
static SelectObjectAttr getChecked(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, ::mlir::MLIRContext *context, Attribute target);
|
|
static ::llvm::LogicalResult verify(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, Attribute target);
|
|
static ::llvm::LogicalResult verifyInvariants(::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError, Attribute target);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"select_object"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
Attribute getTarget() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPUBlockMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPUBlockMappingAttr : public ::mlir::Attribute::AttrBase<GPUBlockMappingAttr, ::mlir::Attribute, detail::GPUBlockMappingAttrStorage, ::mlir::DeviceMappingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.block";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPUBlockMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::MappingId block);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"block"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::MappingId getBlock() const;
|
|
int64_t getMappingId() const;
|
|
bool isLinearMapping() const;
|
|
int64_t getRelativeIndex() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPUWarpgroupMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPUWarpgroupMappingAttr : public ::mlir::Attribute::AttrBase<GPUWarpgroupMappingAttr, ::mlir::Attribute, detail::GPUWarpgroupMappingAttrStorage, ::mlir::DeviceMappingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.warpgroup";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPUWarpgroupMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::MappingId warpgroup);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"warpgroup"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::MappingId getWarpgroup() const;
|
|
int64_t getMappingId() const;
|
|
bool isLinearMapping() const;
|
|
int64_t getRelativeIndex() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPUWarpMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPUWarpMappingAttr : public ::mlir::Attribute::AttrBase<GPUWarpMappingAttr, ::mlir::Attribute, detail::GPUWarpMappingAttrStorage, ::mlir::DeviceMappingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.warp";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPUWarpMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::MappingId warp);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"warp"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::MappingId getWarp() const;
|
|
int64_t getMappingId() const;
|
|
bool isLinearMapping() const;
|
|
int64_t getRelativeIndex() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPUThreadMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPUThreadMappingAttr : public ::mlir::Attribute::AttrBase<GPUThreadMappingAttr, ::mlir::Attribute, detail::GPUThreadMappingAttrStorage, ::mlir::DeviceMappingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.thread";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPUThreadMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::MappingId thread);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"thread"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::MappingId getThread() const;
|
|
int64_t getMappingId() const;
|
|
bool isLinearMapping() const;
|
|
int64_t getRelativeIndex() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPULaneMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPULaneMappingAttr : public ::mlir::Attribute::AttrBase<GPULaneMappingAttr, ::mlir::Attribute, detail::GPULaneMappingAttrStorage, ::mlir::DeviceMappingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.lane";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPULaneMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::MappingId lane);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"lane"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::MappingId getLane() const;
|
|
int64_t getMappingId() const;
|
|
bool isLinearMapping() const;
|
|
int64_t getRelativeIndex() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPUMappingMaskAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPUMappingMaskAttr : public ::mlir::Attribute::AttrBase<GPUMappingMaskAttr, ::mlir::Attribute, detail::GPUMappingMaskAttrStorage, ::mlir::DeviceMaskingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.mask";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPUMappingMaskAttr get(::mlir::MLIRContext *context, uint64_t mask);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"mask"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
uint64_t getMask() const;
|
|
Value createLogicalLinearMappingId(OpBuilder&builder, Value physicalLinearMappingId) const;
|
|
Value createIsActiveIdPredicate(OpBuilder&builder, Value physicalLinearMappingId) const;
|
|
int64_t getMaxNumPhysicalIds() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct GPUMemorySpaceMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class GPUMemorySpaceMappingAttr : public ::mlir::Attribute::AttrBase<GPUMemorySpaceMappingAttr, ::mlir::Attribute, detail::GPUMemorySpaceMappingAttrStorage, ::mlir::DeviceMappingAttrInterface::Trait> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.memory_space";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static GPUMemorySpaceMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::AddressSpace address_space);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"memory_space"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::AddressSpace getAddressSpace() const;
|
|
int64_t getMappingId() const;
|
|
bool isLinearMapping() const;
|
|
int64_t getRelativeIndex() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct ParallelLoopDimMappingAttrStorage;
|
|
|
|
} // namespace detail
|
|
class ParallelLoopDimMappingAttr : public ::mlir::Attribute::AttrBase<ParallelLoopDimMappingAttr, ::mlir::Attribute, detail::ParallelLoopDimMappingAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.loop_dim_map";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static ParallelLoopDimMappingAttr get(::mlir::MLIRContext *context, ::mlir::gpu::Processor processor, AffineMap map, AffineMap bound);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"loop_dim_map"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::Processor getProcessor() const;
|
|
AffineMap getMap() const;
|
|
AffineMap getBound() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct AllReduceOperationAttrStorage;
|
|
|
|
} // namespace detail
|
|
class AllReduceOperationAttr : public ::mlir::Attribute::AttrBase<AllReduceOperationAttr, ::mlir::Attribute, detail::AllReduceOperationAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.all_reduce_op";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static AllReduceOperationAttr get(::mlir::MLIRContext *context, ::mlir::gpu::AllReduceOperation value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"all_reduce_op"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::AllReduceOperation getValue() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct ShuffleModeAttrStorage;
|
|
|
|
} // namespace detail
|
|
class ShuffleModeAttr : public ::mlir::Attribute::AttrBase<ShuffleModeAttr, ::mlir::Attribute, detail::ShuffleModeAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.shuffle_mode";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static ShuffleModeAttr get(::mlir::MLIRContext *context, ::mlir::gpu::ShuffleMode value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"shuffle_mode"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::ShuffleMode getValue() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct MMAElementwiseOpAttrStorage;
|
|
|
|
} // namespace detail
|
|
class MMAElementwiseOpAttr : public ::mlir::Attribute::AttrBase<MMAElementwiseOpAttr, ::mlir::Attribute, detail::MMAElementwiseOpAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.mma_element_wise";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static MMAElementwiseOpAttr get(::mlir::MLIRContext *context, ::mlir::gpu::MMAElementwiseOp value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"mma_element_wise"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::MMAElementwiseOp getValue() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct Prune2To4SpMatFlagAttrStorage;
|
|
|
|
} // namespace detail
|
|
class Prune2To4SpMatFlagAttr : public ::mlir::Attribute::AttrBase<Prune2To4SpMatFlagAttr, ::mlir::Attribute, detail::Prune2To4SpMatFlagAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.prune_2to4_spmat_flag";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static Prune2To4SpMatFlagAttr get(::mlir::MLIRContext *context, ::mlir::gpu::Prune2To4SpMatFlag value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"prune_2to4_spmat_flag"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::Prune2To4SpMatFlag getValue() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct TransposeModeAttrStorage;
|
|
|
|
} // namespace detail
|
|
class TransposeModeAttr : public ::mlir::Attribute::AttrBase<TransposeModeAttr, ::mlir::Attribute, detail::TransposeModeAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.mat_transpose_mode";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static TransposeModeAttr get(::mlir::MLIRContext *context, ::mlir::gpu::TransposeMode value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"mat_transpose_mode"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::TransposeMode getValue() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct SpGEMMWorkEstimationOrComputeKindAttrStorage;
|
|
|
|
} // namespace detail
|
|
class SpGEMMWorkEstimationOrComputeKindAttr : public ::mlir::Attribute::AttrBase<SpGEMMWorkEstimationOrComputeKindAttr, ::mlir::Attribute, detail::SpGEMMWorkEstimationOrComputeKindAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.spgemm_work_estimation_or_compute_kind";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static SpGEMMWorkEstimationOrComputeKindAttr get(::mlir::MLIRContext *context, ::mlir::gpu::SpGEMMWorkEstimationOrComputeKind value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"spgemm_work_estimation_or_compute_kind"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::SpGEMMWorkEstimationOrComputeKind getValue() const;
|
|
};
|
|
namespace detail {
|
|
|
|
struct BroadcastTypeAttrStorage;
|
|
|
|
} // namespace detail
|
|
class BroadcastTypeAttr : public ::mlir::Attribute::AttrBase<BroadcastTypeAttr, ::mlir::Attribute, detail::BroadcastTypeAttrStorage> {
|
|
public:
|
|
using Base::Base;
|
|
static constexpr ::llvm::StringLiteral name = "gpu.broadcast";
|
|
static constexpr ::llvm::StringLiteral dialectName = "gpu";
|
|
static BroadcastTypeAttr get(::mlir::MLIRContext *context, ::mlir::gpu::BroadcastType value);
|
|
static constexpr ::llvm::StringLiteral getMnemonic() {
|
|
return {"broadcast"};
|
|
}
|
|
|
|
static ::mlir::Attribute parse(::mlir::AsmParser &odsParser, ::mlir::Type odsType);
|
|
void print(::mlir::AsmPrinter &odsPrinter) const;
|
|
::mlir::gpu::BroadcastType getValue() const;
|
|
};
|
|
|
|
} // namespace mlir::gpu
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::AddressSpaceAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::BarrierScopeAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::DimensionAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::KernelMetadataAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::KernelTableAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::ObjectAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::SelectObjectAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPUBlockMappingAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPUWarpgroupMappingAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPUWarpMappingAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPUThreadMappingAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPULaneMappingAttr)
|
|
MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPUMappingMaskAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::GPUMemorySpaceMappingAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::ParallelLoopDimMappingAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::AllReduceOperationAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::ShuffleModeAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::MMAElementwiseOpAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::Prune2To4SpMatFlagAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::TransposeModeAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::SpGEMMWorkEstimationOrComputeKindAttr)
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MLIR_DECLARE_EXPLICIT_TYPE_ID(::mlir::gpu::BroadcastTypeAttr)
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#endif // GET_ATTRDEF_CLASSES
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