164 lines
6.0 KiB
C++
164 lines
6.0 KiB
C++
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|* *|
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|* Enum Utility Definitions *|
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|* *|
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|* Automatically generated file, do not edit! *|
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|* From: NVGPU.td *|
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|* *|
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\*===----------------------------------------------------------------------===*/
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namespace mlir::nvgpu {
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::llvm::StringRef stringifyRcpRoundingMode(RcpRoundingMode val) {
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switch (val) {
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case RcpRoundingMode::APPROX: return "approx";
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case RcpRoundingMode::RN: return "rn";
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case RcpRoundingMode::RZ: return "rz";
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case RcpRoundingMode::RM: return "rm";
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case RcpRoundingMode::RP: return "rp";
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}
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return "";
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}
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::std::optional<RcpRoundingMode> symbolizeRcpRoundingMode(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<RcpRoundingMode>>(str)
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.Case("approx", RcpRoundingMode::APPROX)
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.Case("rn", RcpRoundingMode::RN)
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.Case("rz", RcpRoundingMode::RZ)
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.Case("rm", RcpRoundingMode::RM)
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.Case("rp", RcpRoundingMode::RP)
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.Default(::std::nullopt);
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}
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::std::optional<RcpRoundingMode> symbolizeRcpRoundingMode(uint32_t value) {
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switch (value) {
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case 0: return RcpRoundingMode::APPROX;
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case 1: return RcpRoundingMode::RN;
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case 2: return RcpRoundingMode::RZ;
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case 3: return RcpRoundingMode::RM;
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case 4: return RcpRoundingMode::RP;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::nvgpu
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namespace mlir::nvgpu {
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::llvm::StringRef stringifyTensorMapInterleaveKind(TensorMapInterleaveKind val) {
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switch (val) {
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case TensorMapInterleaveKind::INTERLEAVE_NONE: return "none";
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case TensorMapInterleaveKind::INTERLEAVE_16B: return "interleave_16b";
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case TensorMapInterleaveKind::INTERLEAVE_32B: return "interleave_32b";
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}
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return "";
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}
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::std::optional<TensorMapInterleaveKind> symbolizeTensorMapInterleaveKind(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<TensorMapInterleaveKind>>(str)
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.Case("none", TensorMapInterleaveKind::INTERLEAVE_NONE)
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.Case("interleave_16b", TensorMapInterleaveKind::INTERLEAVE_16B)
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.Case("interleave_32b", TensorMapInterleaveKind::INTERLEAVE_32B)
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.Default(::std::nullopt);
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}
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::std::optional<TensorMapInterleaveKind> symbolizeTensorMapInterleaveKind(uint32_t value) {
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switch (value) {
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case 0: return TensorMapInterleaveKind::INTERLEAVE_NONE;
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case 1: return TensorMapInterleaveKind::INTERLEAVE_16B;
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case 2: return TensorMapInterleaveKind::INTERLEAVE_32B;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::nvgpu
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namespace mlir::nvgpu {
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::llvm::StringRef stringifyTensorMapL2PromoKind(TensorMapL2PromoKind val) {
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switch (val) {
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case TensorMapL2PromoKind::L2PROMO_NONE: return "none";
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case TensorMapL2PromoKind::L2PROMO_64B: return "l2promo_64b";
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case TensorMapL2PromoKind::L2PROMO_128B: return "l2promo_128b";
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case TensorMapL2PromoKind::L2PROMO_256B: return "l2promo_256b";
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}
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return "";
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}
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::std::optional<TensorMapL2PromoKind> symbolizeTensorMapL2PromoKind(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<TensorMapL2PromoKind>>(str)
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.Case("none", TensorMapL2PromoKind::L2PROMO_NONE)
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.Case("l2promo_64b", TensorMapL2PromoKind::L2PROMO_64B)
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.Case("l2promo_128b", TensorMapL2PromoKind::L2PROMO_128B)
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.Case("l2promo_256b", TensorMapL2PromoKind::L2PROMO_256B)
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.Default(::std::nullopt);
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}
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::std::optional<TensorMapL2PromoKind> symbolizeTensorMapL2PromoKind(uint32_t value) {
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switch (value) {
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case 0: return TensorMapL2PromoKind::L2PROMO_NONE;
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case 1: return TensorMapL2PromoKind::L2PROMO_64B;
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case 2: return TensorMapL2PromoKind::L2PROMO_128B;
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case 3: return TensorMapL2PromoKind::L2PROMO_256B;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::nvgpu
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namespace mlir::nvgpu {
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::llvm::StringRef stringifyTensorMapOOBKind(TensorMapOOBKind val) {
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switch (val) {
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case TensorMapOOBKind::OOB_ZERO: return "zero";
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case TensorMapOOBKind::OOB_NAN: return "nan";
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}
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return "";
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}
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::std::optional<TensorMapOOBKind> symbolizeTensorMapOOBKind(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<TensorMapOOBKind>>(str)
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.Case("zero", TensorMapOOBKind::OOB_ZERO)
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.Case("nan", TensorMapOOBKind::OOB_NAN)
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.Default(::std::nullopt);
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}
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::std::optional<TensorMapOOBKind> symbolizeTensorMapOOBKind(uint32_t value) {
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switch (value) {
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case 0: return TensorMapOOBKind::OOB_ZERO;
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case 1: return TensorMapOOBKind::OOB_NAN;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::nvgpu
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namespace mlir::nvgpu {
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::llvm::StringRef stringifyTensorMapSwizzleKind(TensorMapSwizzleKind val) {
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switch (val) {
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case TensorMapSwizzleKind::SWIZZLE_NONE: return "none";
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case TensorMapSwizzleKind::SWIZZLE_32B: return "swizzle_32b";
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case TensorMapSwizzleKind::SWIZZLE_64B: return "swizzle_64b";
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case TensorMapSwizzleKind::SWIZZLE_128B: return "swizzle_128b";
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}
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return "";
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}
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::std::optional<TensorMapSwizzleKind> symbolizeTensorMapSwizzleKind(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<TensorMapSwizzleKind>>(str)
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.Case("none", TensorMapSwizzleKind::SWIZZLE_NONE)
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.Case("swizzle_32b", TensorMapSwizzleKind::SWIZZLE_32B)
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.Case("swizzle_64b", TensorMapSwizzleKind::SWIZZLE_64B)
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.Case("swizzle_128b", TensorMapSwizzleKind::SWIZZLE_128B)
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.Default(::std::nullopt);
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}
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::std::optional<TensorMapSwizzleKind> symbolizeTensorMapSwizzleKind(uint32_t value) {
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switch (value) {
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case 0: return TensorMapSwizzleKind::SWIZZLE_NONE;
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case 1: return TensorMapSwizzleKind::SWIZZLE_32B;
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case 2: return TensorMapSwizzleKind::SWIZZLE_64B;
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case 3: return TensorMapSwizzleKind::SWIZZLE_128B;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::nvgpu
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