61 lines
2.7 KiB
TableGen
61 lines
2.7 KiB
TableGen
//===- XeGPUDialect.td - XeGPU dialect definition -----------*- tablegen -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef MLIR_DIALECT_XEGPU_IR_XEGPUDIALECT_TD
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#define MLIR_DIALECT_XEGPU_IR_XEGPUDIALECT_TD
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include "mlir/IR/OpBase.td"
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def XeGPU_Dialect : Dialect {
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let name = "xegpu";
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let cppNamespace = "::mlir::xegpu";
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let summary = "The XeGPU dialect that models Intel GPU's ISA";
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let description = [{
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The XeGPU dialect closely models a subset of the Xe GPU's ISA, providing an
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abstraction to support high-performance GEMM code generation. It serves as a
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bridge dialect in the MLIR gradual lowering process, working with MLIR memref
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and vector types, and complements the Arith, Math, Vector, and Memref dialects.
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XeGPU operations are introduced for special Xe instructions not modeled by the
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LLVM/SPIR-V dialect, such as DPAS and 2D block load and store.
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It supports a tile-based programming model, decomposing the GEMM kernel into
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large predefined tile sizes at the subgroup and workgroup levels. XeGPU allows
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the high-level GEMM algorithm to be easily expressed. Underneath, it uses
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target-specific recipes and hardware features to achieve optimal performance
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on specific hardware. By decomposing GEMM at submatrix granularity and mapping it
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to registers, it naturally supports optimizations like fusing with neighboring
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operations.
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}];
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let dependentDialects = ["arith::ArithDialect"];
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let useDefaultTypePrinterParser = true;
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let useDefaultAttributePrinterParser = true;
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let extraClassDeclaration = [{
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/// Checks if the given memref type represents shared local memory (SLM).
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/// Returns true if the memory space is address space 3, MemorySpace::SLM,
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/// xevm::AddrSpace::SHARED, or a GPU workgroup memory address space.
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static bool isSharedMemory(const MemRefType &memrefTy);
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/// drops/slices the shape in the specified dims, and return the rest. e.g.,
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/// for shape = [32, 64, 8], dims = [0, 2], it will return [64]
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template<typename T, typename U>
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static llvm::SmallVector<T> slice(llvm::ArrayRef<T> shape, llvm::ArrayRef<U> dims) {
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llvm::SmallVector<T> result;
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for (auto [i, v]: llvm::enumerate(shape)) {
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if (!llvm::is_contained(dims, i))
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result.push_back(v);
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}
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return result;
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}
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}];
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}
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#endif // MLIR_DIALECT_XEGPU_IR_XEGPUDIALECT_TD
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