Add the missing TPS2121 status pull-up (R108) and correct the power-mux docs

The power mux's status output had no pull-up, which broke the USB current
budget interlock.

TPS2121 ST is an open-drain output; the datasheet lists RST = 6-20 kOhm under
Recommended Operating Conditions, alongside RILM, so it is an external part.
ST is driven low only while IN2 (the J3 external 5 V header) is sourcing OUT,
and is high impedance whenever IN1 (the J7 USB-C input) is sourcing. U10 gate 2
inverts MUX_ST into EXT_SELECTED, and MAIN_EN = USB_3A_OK OR EXT_SELECTED
enables the 15 A core buck. With MUX_ST floating on USB-C power, a drift low
asserts MAIN_EN no matter what the TUSB320 advertised, so the board would try
to bring up the core rail on a 500 mA port. Every other open-drain net here
already has its pull-up (R7/R8, R30, R33/R34, R98/R104/R105/R106); this one was
missed.

R108 (10 k, VCC3V3_AUX -> MUX_ST) is appended at the end of design_data.py
rather than beside the mux: reference designators are assigned in call order,
so inserting it mid-file would renumber every later resistor and invalidate the
routed board. Placed at (53.0, 101.6), 2.4 mm from the U10 gate it holds up,
on a site checked clear of existing copper, and routed with close_remaining.py.

Also corrects POWER_TREE.md, which credited PR1 for giving the external input
priority. PR1 = GND actually *disables* priority mode; CP2 (tied to VCC3V3_AUX)
is what selects IN2. Since CP2 derives from the mux's own output the behaviour
is two-phase - highest-voltage wins at cold start, IN2 unconditionally once the
aux rail is up - so with both inputs connected there can be one seamless
switchover at startup. Documented, with the numbers: both eFuses UV 3.98 V /
OV 5.80 V, ILIM 2.69 A (USB-C) and 4.04 A (header), mux OV 5.69 V / ILIM 4.5 A.
The two inputs are never summed: both eFuses block reverse current and the mux
bonds exactly one input at a time.

board_routed.kicad_sch/.kicad_sym are now gitignored byte copies of the tracked
schematic; kicad-cli needs them beside the board for --schematic-parity, and
deleting them in the previous commit had silently disabled that check.

Verified: ERC 0/0, DRC 0 violations, 0 unconnected, every net one copper group,
schematic parity unchanged at the 402 pre-existing warnings.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_012KaTmCCxCEW4awsmXRNT1d

hardware/board.kicad_sym

@@ -3733,7 +3733,7 @@
     (property "Manufacturer" "Texas Instruments" (id 5) (at 0.0 0.0 0)
       (effects (font (size 0.8 0.8)) hide)
     )
-    (property "Description" "4.5-A power mux; external input wins near-equal valid 5-V inputs" (id 6) (at 0.0 0.0 0)
+    (property "Description" "4.5-A power mux.  PR1=GND disables priority mode; CP2 tied to VCC3V3_AUX is what selects IN2 (external 5 V) once the aux rail is up" (id 6) (at 0.0 0.0 0)
       (effects (font (size 0.8 0.8)) hide)
     )
     (symbol "BOARD_U9_1_1"
@@ -14912,6 +14912,43 @@
       )
     )
   )
+  (symbol "BOARD_R108" (pin_names (offset 0.508)) (in_bom yes) (on_board yes)
+    (property "Reference" "R" (id 0) (at 0.0 0.0 0)
+      (effects (font (size 1.27 1.27)))
+    )
+    (property "Value" "10K" (id 1) (at 0.0 0.0 0)
+      (effects (font (size 1.27 1.27)))
+    )
+    (property "Footprint" "Resistor_SMD:R_0402_1005Metric" (id 2) (at 0.0 0.0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "Datasheet" "" (id 3) (at 0.0 0.0 0)
+      (effects (font (size 1.27 1.27)) hide)
+    )
+    (property "MPN" "RC0402FR-0710KL" (id 4) (at 0.0 0.0 0)
+      (effects (font (size 0.8 0.8)) hide)
+    )
+    (property "Manufacturer" "Yageo" (id 5) (at 0.0 0.0 0)
+      (effects (font (size 0.8 0.8)) hide)
+    )
+    (property "Description" "TPS2121 open-drain status pull-up (RST, 6-20 kohm)" (id 6) (at 0.0 0.0 0)
+      (effects (font (size 0.8 0.8)) hide)
+    )
+    (symbol "BOARD_R108_1_1"
+      (rectangle (start -12.7 -3.81) (end 12.7 3.81)
+        (stroke (width 0.254) (type default))
+        (fill (type background))
+      )
+      (pin passive line (at -17.78 0.0 0) (length 5.08)
+        (name "1" (effects (font (size 0.65 0.65))))
+        (number "1" (effects (font (size 0.65 0.65))))
+      )
+      (pin passive line (at 17.78 0.0 180) (length 5.08)
+        (name "2" (effects (font (size 0.65 0.65))))
+        (number "2" (effects (font (size 0.65 0.65))))
+      )
+    )
+  )
   (symbol "PWR_FLAG" (power) (in_bom no) (on_board no)
     (property "Reference" "#FLG" (id 0) (at 0.0 0.0 0)
       (effects (font (size 1.27 1.27)))