Add the missing TPS2121 status pull-up (R108) and correct the power-mux docs

The power mux's status output had no pull-up, which broke the USB current
budget interlock.

TPS2121 ST is an open-drain output; the datasheet lists RST = 6-20 kOhm under
Recommended Operating Conditions, alongside RILM, so it is an external part.
ST is driven low only while IN2 (the J3 external 5 V header) is sourcing OUT,
and is high impedance whenever IN1 (the J7 USB-C input) is sourcing. U10 gate 2
inverts MUX_ST into EXT_SELECTED, and MAIN_EN = USB_3A_OK OR EXT_SELECTED
enables the 15 A core buck. With MUX_ST floating on USB-C power, a drift low
asserts MAIN_EN no matter what the TUSB320 advertised, so the board would try
to bring up the core rail on a 500 mA port. Every other open-drain net here
already has its pull-up (R7/R8, R30, R33/R34, R98/R104/R105/R106); this one was
missed.

R108 (10 k, VCC3V3_AUX -> MUX_ST) is appended at the end of design_data.py
rather than beside the mux: reference designators are assigned in call order,
so inserting it mid-file would renumber every later resistor and invalidate the
routed board. Placed at (53.0, 101.6), 2.4 mm from the U10 gate it holds up,
on a site checked clear of existing copper, and routed with close_remaining.py.

Also corrects POWER_TREE.md, which credited PR1 for giving the external input
priority. PR1 = GND actually *disables* priority mode; CP2 (tied to VCC3V3_AUX)
is what selects IN2. Since CP2 derives from the mux's own output the behaviour
is two-phase - highest-voltage wins at cold start, IN2 unconditionally once the
aux rail is up - so with both inputs connected there can be one seamless
switchover at startup. Documented, with the numbers: both eFuses UV 3.98 V /
OV 5.80 V, ILIM 2.69 A (USB-C) and 4.04 A (header), mux OV 5.69 V / ILIM 4.5 A.
The two inputs are never summed: both eFuses block reverse current and the mux
bonds exactly one input at a time.

board_routed.kicad_sch/.kicad_sym are now gitignored byte copies of the tracked
schematic; kicad-cli needs them beside the board for --schematic-parity, and
deleting them in the previous commit had silently disabled that check.

Verified: ERC 0/0, DRC 0 violations, 0 unconnected, every net one copper group,
schematic parity unchanged at the 402 pre-existing warnings.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_012KaTmCCxCEW4awsmXRNT1d

hardware/power_usb.sch

@@ -4706,4 +4706,25 @@ Wire Wire Line
 	17500 16500 17650 16500
 Text GLabel 17650 16500 0    30   BiDi ~ 0
 GND
+$Comp
+L BOARD_R108 R108
+U 1 1 650100C8
+P 16800 17300
+F 0 "R108" H 16800 17200 50  0000 C CNN
+F 1 "10K" H 16800 17400 50  0000 C CNN
+F 2 "Resistor_SMD:R_0402_1005Metric" H 16800 17100 50  0001 C CNN
+F 3 "" H 16800 17300 50  0001 C CNN
+F 4 "RC0402FR-0710KL" H 16800 17300 50  0001 C CNN "MPN"
+F 5 "Yageo" H 16800 17300 50  0001 C CNN "Manufacturer"
+	1    16800 17300
+	1    0    0    -1
+$EndComp
+Wire Wire Line
+	16100 17300 15950 17300
+Text GLabel 15950 17300 2    30   BiDi ~ 0
+VCC3V3_AUX
+Wire Wire Line
+	17500 17300 17650 17300
+Text GLabel 17650 17300 0    30   BiDi ~ 0
+MUX_ST
 $EndSCHEMATC