(version 1) # The edge-launch SMA copper must reach the routed board edge by construction. (rule "J2 edge-launch lands" (condition "A.Reference == 'J2' || B.Reference == 'J2'") (constraint edge_clearance (min -0.01mm))) # The manufacturer USB-C locating holes are 0.194 mm from grounded shell # lands. This exception is internal to the qualified connector footprint. (rule "USB-C locating-hole clearance" (condition "A.Reference == 'J1' && B.Reference == 'J1'") (constraint hole_clearance (min 0.19mm))) # RZV0024A is an ultra-dense high-current package. Its adjusted corner lands # and thermal zones meet the selected JLCPCB 0.10-mm copper rule. (rule "TPS6287B RZV internal clearance" (condition "A.Reference == 'U13' && B.Reference == 'U13'") (constraint clearance (min 0.10mm))) # Inside the Ti375 escape field the 0.8-mm ball pitch fixes the geometry: a # 0.45-mm dogbone via between four lands leaves 0.1407 mm, and a 0.12-mm trace # threading between two lands leaves 0.14 mm only if it stays exactly centred. # This field therefore runs at the fabricator's 0.10-mm copper minimum, which # is what the Default class uses across the rest of the board anyway. The rule # only fires when one of the two objects belongs to U1, so it relaxes copper # against the balls and nothing else: two tracks crossing the field still owe # each other their own net classes' clearance, CLOCK's 0.15 mm included. (rule "Ti375 0.8-mm BGA escape clearance" (condition "A.Reference == 'U1' || B.Reference == 'U1'") (constraint clearance (min 0.10mm))) # JLC08161H-3313 L1/L2 geometry. Net-class widths are routing defaults only; # these rules make the controlled-impedance geometries actual DRC limits. (rule "GNSS 50-ohm CPWG geometry" (condition "A.NetClass == 'RF50_CPWG'") (constraint track_width (min 0.164mm) (opt 0.164mm) (max 0.164mm))) (rule "GNSS RF stays on top layer" (condition "A.NetClass == 'RF50_CPWG' && A.Type == 'Track' && A.Layer != 'F.Cu'") (constraint disallow track)) (rule "USB2 90-ohm differential geometry" (condition "A.NetClass == 'USB90_DIFF'") (constraint track_width (min 0.135mm) (opt 0.135mm) (max 0.135mm))) # The TPD2EUSB30A clamp is a SOT-23 whose ground pad sits between its two # channel pads, so the pair has to open up for about 1.5 mm to pass it. The # 0.90-mm coupled limit still applies over the whole rest of the run. (rule "USB2 coupled gap" (condition "A.NetClass == 'USB90_DIFF' && AB.isCoupledDiffPair() && !A.intersectsArea('USB_ESD_BREAKOUT')") (constraint diff_pair_gap (min 0.15mm) (opt 0.15mm) (max 0.90mm))) # The GPS front end owns its region on every layer under F.Cu, so no digital # route can run beneath or immediately beside the 50-ohm line and no return # path there is broken. Ground stitching and the MAX2771's own supply drops # still have to reach it, so the disallow is scoped to the signal classes # rather than made a plain keepout. The RF line itself is on F.Cu, which the # area does not cover, and L2/L7 stay solid because nothing routes on them. (rule "No digital copper under the GNSS front end" (condition "A.intersectsArea('RF_NO_DIGITAL') && A.NetClass != 'POWER'") (constraint disallow track via)) (rule "Clock trunk width outside Ti375 escape" (condition "A.NetClass == 'CLOCK' && A.Type == 'Track' && !A.insideCourtyard('U1')") (constraint track_width (min 0.15mm)))