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max2771 spi liens has been added.

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onur
2026-08-06 22:14:52 +03:00
parent 847523078b
commit b4920d31e3
288 changed files with 214687 additions and 18389 deletions
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.Xil/genesys2_rocket_top_propImpl.xdc
+5 -5
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@@ -1,8 +1,8 @@
set_property SRC_FILE_INFO {cfile:/home/onur/Desktop/rocket/rocket-chip/hardware/fpga/genesys2/constraints/genesys2_rocket.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_rocket.xdc id:1} [current_design]
set_property SRC_FILE_INFO {cfile:/home/onur/Desktop/rocket/rocket-chip/hardware/fpga/genesys2/constraints/genesys2_pmod_spi.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_spi.xdc id:2} [current_design]
set_property SRC_FILE_INFO {cfile:/home/onur/Desktop/rocket/rocket-chip/hardware/fpga/genesys2/constraints/genesys2_pmod_irq.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_irq.xdc id:3} [current_design]
set_property SRC_FILE_INFO {cfile:/home/onur/Desktop/rocket/rocket-chip/hardware/fpga/genesys2/constraints/genesys2_pmod_pps.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_pps.xdc id:4} [current_design]
set_property SRC_FILE_INFO {cfile:/home/onur/Desktop/rocket/rocket-chip/hardware/fpga/genesys2/constraints/genesys2_pmod_rf.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_rf.xdc id:5} [current_design]
set_property SRC_FILE_INFO {cfile:/home/ankaoc/Desktop/tmp/gps/hardware/fpga/genesys2/constraints/genesys2_rocket.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_rocket.xdc id:1} [current_design]
set_property SRC_FILE_INFO {cfile:/home/ankaoc/Desktop/tmp/gps/hardware/fpga/genesys2/constraints/genesys2_pmod_spi.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_spi.xdc id:2} [current_design]
set_property SRC_FILE_INFO {cfile:/home/ankaoc/Desktop/tmp/gps/hardware/fpga/genesys2/constraints/genesys2_pmod_irq.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_irq.xdc id:3} [current_design]
set_property SRC_FILE_INFO {cfile:/home/ankaoc/Desktop/tmp/gps/hardware/fpga/genesys2/constraints/genesys2_pmod_pps.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_pps.xdc id:4} [current_design]
set_property SRC_FILE_INFO {cfile:/home/ankaoc/Desktop/tmp/gps/hardware/fpga/genesys2/constraints/genesys2_pmod_rf.xdc rfile:../hardware/fpga/genesys2/constraints/genesys2_pmod_rf.xdc id:5} [current_design]
set_property src_info {type:XDC file:1 line:4 export:INPUT save:INPUT read:READ} [current_design]
set_property PACKAGE_PIN AD12 [get_ports sysclk_p]
set_property src_info {type:XDC file:1 line:5 export:INPUT save:INPUT read:READ} [current_design]