onur
89 lines
3.8 KiB
Systemverilog
89 lines
3.8 KiB
Systemverilog
// Generated by CIRCT firtool-1.151.0
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module BreakpointUnit(
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input io_status_debug,
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io_bp_0_control_action,
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input [1:0] io_bp_0_control_tmatch,
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input io_bp_0_control_x,
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io_bp_0_control_w,
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io_bp_0_control_r,
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input [32:0] io_bp_0_address,
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io_pc,
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io_ea,
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output io_xcpt_if,
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io_xcpt_ld,
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io_xcpt_st,
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io_debug_if,
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io_debug_ld,
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io_debug_st
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);
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wire _w_T_2 = io_ea >= io_bp_0_address;
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wire [32:0] _w_T_5 = ~io_ea;
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wire _r_T_8 = io_bp_0_control_tmatch[0] & io_bp_0_address[0];
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wire _r_T_10 = _r_T_8 & io_bp_0_address[1];
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wire [32:0] _x_T_15 = ~io_bp_0_address;
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wire _r_T_18 = io_bp_0_control_tmatch[0] & io_bp_0_address[0];
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wire _r_T_20 = _r_T_18 & io_bp_0_address[1];
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wire r =
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~io_status_debug & io_bp_0_control_r
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& (io_bp_0_control_tmatch[1]
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? _w_T_2 ^ io_bp_0_control_tmatch[0]
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: {_w_T_5[32:4],
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_w_T_5[3:0]
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| {_r_T_10 & io_bp_0_address[2],
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_r_T_10,
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_r_T_8,
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io_bp_0_control_tmatch[0]}} == {_x_T_15[32:4],
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_x_T_15[3:0]
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| {_r_T_20 & io_bp_0_address[2],
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_r_T_20,
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_r_T_18,
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io_bp_0_control_tmatch[0]}});
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wire _w_T_8 = io_bp_0_control_tmatch[0] & io_bp_0_address[0];
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wire _w_T_10 = _w_T_8 & io_bp_0_address[1];
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wire _w_T_18 = io_bp_0_control_tmatch[0] & io_bp_0_address[0];
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wire _w_T_20 = _w_T_18 & io_bp_0_address[1];
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wire w =
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~io_status_debug & io_bp_0_control_w
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& (io_bp_0_control_tmatch[1]
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? _w_T_2 ^ io_bp_0_control_tmatch[0]
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: {_w_T_5[32:4],
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_w_T_5[3:0]
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| {_w_T_10 & io_bp_0_address[2],
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_w_T_10,
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_w_T_8,
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io_bp_0_control_tmatch[0]}} == {_x_T_15[32:4],
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_x_T_15[3:0]
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| {_w_T_20 & io_bp_0_address[2],
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_w_T_20,
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_w_T_18,
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io_bp_0_control_tmatch[0]}});
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wire [32:0] _x_T_5 = ~io_pc;
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wire _x_T_8 = io_bp_0_control_tmatch[0] & io_bp_0_address[0];
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wire _x_T_10 = _x_T_8 & io_bp_0_address[1];
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wire _x_T_18 = io_bp_0_control_tmatch[0] & io_bp_0_address[0];
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wire _x_T_20 = _x_T_18 & io_bp_0_address[1];
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wire x =
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~io_status_debug & io_bp_0_control_x
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& (io_bp_0_control_tmatch[1]
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? io_pc >= io_bp_0_address ^ io_bp_0_control_tmatch[0]
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: {_x_T_5[32:4],
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_x_T_5[3:0]
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| {_x_T_10 & io_bp_0_address[2],
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_x_T_10,
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_x_T_8,
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io_bp_0_control_tmatch[0]}} == {_x_T_15[32:4],
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_x_T_15[3:0]
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| {_x_T_20 & io_bp_0_address[2],
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_x_T_20,
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_x_T_18,
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io_bp_0_control_tmatch[0]}});
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assign io_xcpt_if = x & ~io_bp_0_control_action;
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assign io_xcpt_ld = r & ~io_bp_0_control_action;
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assign io_xcpt_st = w & ~io_bp_0_control_action;
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assign io_debug_if = x & io_bp_0_control_action;
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assign io_debug_ld = r & io_bp_0_control_action;
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assign io_debug_st = w & io_bp_0_control_action;
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endmodule
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