39 lines
1.0 KiB
INI
39 lines
1.0 KiB
INI
# Genesys2 Rocket debug over Xilinx BSCAN.
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#
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# This reaches the Rocket DMI debug port through:
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# Digilent FTDI JTAG -> Xilinx XC7K325T TAP -> BSCANE2 USER chain -> DMI tunnel
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adapter driver ftdi
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ftdi device_desc "Digilent Adept USB Device"
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ftdi vid_pid 0x0403 0x6010
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# Genesys2 exposes the FPGA JTAG TAP on FT2232H channel B. Channel A is not the
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# chain that reaches the Kintex-7 TAP on this board.
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ftdi channel 1
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# Digilent Adept 6010 wiring uses the HS1-style four-wire JTAG layout here; no
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# dedicated board reset is controlled by OpenOCD.
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ftdi layout_init 0x0088 0x008b
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reset_config none
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if {![info exists ADAPTER_SPEED]} {
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set ADAPTER_SPEED 1000
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}
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adapter speed $ADAPTER_SPEED
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if {![info exists CHIPNAME]} {
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set CHIPNAME xc7
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}
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source [find cpld/xilinx-xc7.cfg]
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target create rocket.cpu riscv -chain-position xc7.tap -coreid 0
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# Match hardware/fpga/genesys2/rtl/rocket_bscan_dmi_tunnel.sv.
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riscv set_ir dtmcs 0x10
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riscv set_ir dmi 0x11
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riscv use_bscan_tunnel 5 0
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riscv set_reset_timeout_sec 10
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riscv set_command_timeout_sec 10
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init
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halt
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