onur
140 lines
5.8 KiB
Systemverilog
140 lines
5.8 KiB
Systemverilog
// Generated by CIRCT firtool-1.151.0
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// Users can define 'PRINTF_COND' to add an extra gate to prints.
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`ifndef PRINTF_COND_
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`ifdef PRINTF_COND
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`define PRINTF_COND_ (`PRINTF_COND)
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`else // PRINTF_COND
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`define PRINTF_COND_ 1
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`endif // PRINTF_COND
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`endif // not def PRINTF_COND_
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module TLToAPB(
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input clock,
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reset,
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output auto_in_a_ready,
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input auto_in_a_valid,
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input [2:0] auto_in_a_bits_opcode,
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auto_in_a_bits_param,
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input [1:0] auto_in_a_bits_size,
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input [6:0] auto_in_a_bits_source,
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input [28:0] auto_in_a_bits_address,
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input auto_in_a_bits_user_amba_prot_bufferable,
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auto_in_a_bits_user_amba_prot_modifiable,
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auto_in_a_bits_user_amba_prot_readalloc,
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auto_in_a_bits_user_amba_prot_writealloc,
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auto_in_a_bits_user_amba_prot_privileged,
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auto_in_a_bits_user_amba_prot_secure,
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auto_in_a_bits_user_amba_prot_fetch,
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input [3:0] auto_in_a_bits_mask,
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input [31:0] auto_in_a_bits_data,
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input auto_in_a_bits_corrupt,
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auto_in_d_ready,
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output auto_in_d_valid,
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output [2:0] auto_in_d_bits_opcode,
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output [1:0] auto_in_d_bits_param,
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auto_in_d_bits_size,
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output [6:0] auto_in_d_bits_source,
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output auto_in_d_bits_sink,
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auto_in_d_bits_denied,
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output [31:0] auto_in_d_bits_data,
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output auto_in_d_bits_corrupt,
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auto_out_psel,
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auto_out_penable,
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auto_out_pwrite,
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output [28:0] auto_out_paddr,
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output [31:0] auto_out_pwdata,
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input auto_out_pready,
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auto_out_pslverr,
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input [31:0] auto_out_prdata
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);
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wire _a_q_io_deq_valid;
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wire [2:0] _a_q_io_deq_bits_opcode;
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wire [1:0] _a_q_io_deq_bits_size;
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wire [6:0] _a_q_io_deq_bits_source;
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wire _nodeIn_d_q_io_enq_ready;
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wire _nodeIn_d_q_io_deq_valid;
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reg a_enable;
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reg a_sel_REG;
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wire a_sel = _a_q_io_deq_valid & a_sel_REG;
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reg d_write;
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reg [6:0] d_source;
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reg [1:0] d_size;
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wire d_valid = a_enable & auto_out_pready;
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wire _GEN = ~d_valid | _nodeIn_d_q_io_enq_ready;
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`ifndef SYNTHESIS
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always @(posedge clock) begin
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if ((`PRINTF_COND_) & ~reset & ~_GEN)
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$fwrite(32'h80000002,
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"Assertion failed\n at ToAPB.scala:110 assert (!d.valid || d.ready)\n");
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end // always @(posedge)
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`endif // not def SYNTHESIS
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always @(posedge clock) begin
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if (reset)
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a_enable <= 1'h0;
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else
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a_enable <= ~(_nodeIn_d_q_io_enq_ready & d_valid) & (a_sel | a_enable);
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a_sel_REG <= ~_nodeIn_d_q_io_deq_valid | auto_in_d_ready;
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if (a_sel & ~a_enable) begin
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d_write <= ~(_a_q_io_deq_bits_opcode[2]);
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d_source <= _a_q_io_deq_bits_source;
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d_size <= _a_q_io_deq_bits_size;
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end
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end // always @(posedge)
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Queue1_TLBundleD_a29d32s7k1z2u nodeIn_d_q (
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.clock (clock),
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.reset (reset),
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.io_enq_ready (_nodeIn_d_q_io_enq_ready),
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.io_enq_valid (d_valid),
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.io_enq_bits_opcode ({2'h0, ~d_write}),
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.io_enq_bits_size (d_size),
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.io_enq_bits_source (d_source),
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.io_enq_bits_denied (d_write & auto_out_pslverr),
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.io_enq_bits_data (auto_out_prdata),
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.io_enq_bits_corrupt (~d_write & auto_out_pslverr),
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.io_deq_ready (auto_in_d_ready),
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.io_deq_valid (_nodeIn_d_q_io_deq_valid),
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.io_deq_bits_opcode (auto_in_d_bits_opcode),
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.io_deq_bits_param (auto_in_d_bits_param),
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.io_deq_bits_size (auto_in_d_bits_size),
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.io_deq_bits_source (auto_in_d_bits_source),
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.io_deq_bits_sink (auto_in_d_bits_sink),
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.io_deq_bits_denied (auto_in_d_bits_denied),
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.io_deq_bits_data (auto_in_d_bits_data),
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.io_deq_bits_corrupt (auto_in_d_bits_corrupt)
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);
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Queue1_TLBundleA_a29d32s7k1z2u a_q (
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.clock (clock),
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.reset (reset),
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.io_enq_ready (auto_in_a_ready),
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.io_enq_valid (auto_in_a_valid),
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.io_enq_bits_opcode (auto_in_a_bits_opcode),
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.io_enq_bits_param (auto_in_a_bits_param),
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.io_enq_bits_size (auto_in_a_bits_size),
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.io_enq_bits_source (auto_in_a_bits_source),
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.io_enq_bits_address (auto_in_a_bits_address),
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.io_enq_bits_user_amba_prot_bufferable (auto_in_a_bits_user_amba_prot_bufferable),
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.io_enq_bits_user_amba_prot_modifiable (auto_in_a_bits_user_amba_prot_modifiable),
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.io_enq_bits_user_amba_prot_readalloc (auto_in_a_bits_user_amba_prot_readalloc),
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.io_enq_bits_user_amba_prot_writealloc (auto_in_a_bits_user_amba_prot_writealloc),
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.io_enq_bits_user_amba_prot_privileged (auto_in_a_bits_user_amba_prot_privileged),
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.io_enq_bits_user_amba_prot_secure (auto_in_a_bits_user_amba_prot_secure),
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.io_enq_bits_user_amba_prot_fetch (auto_in_a_bits_user_amba_prot_fetch),
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.io_enq_bits_mask (auto_in_a_bits_mask),
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.io_enq_bits_data (auto_in_a_bits_data),
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.io_enq_bits_corrupt (auto_in_a_bits_corrupt),
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.io_deq_ready (d_valid),
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.io_deq_valid (_a_q_io_deq_valid),
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.io_deq_bits_opcode (_a_q_io_deq_bits_opcode),
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.io_deq_bits_size (_a_q_io_deq_bits_size),
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.io_deq_bits_source (_a_q_io_deq_bits_source),
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.io_deq_bits_address (auto_out_paddr),
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.io_deq_bits_data (auto_out_pwdata)
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);
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assign auto_in_d_valid = _nodeIn_d_q_io_deq_valid;
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assign auto_out_psel = a_sel;
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assign auto_out_penable = a_enable;
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assign auto_out_pwrite = ~(_a_q_io_deq_bits_opcode[2]);
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endmodule
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