13 lines
371 B
Makefile
13 lines
371 B
Makefile
TARGET := max2771_spi_test
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APP_SRCS := main.c
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BSP_SRCS := init.c uart.c max2771_spi.c
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# Direct builds default to Genesys 2. Board flows override these values.
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BSP_UART_CLOCK_HZ ?= 50000000
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BSP_CLINT_TIMEBASE_HZ ?= 500000
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BSP_MAX2771_INPUT_CLOCK_HZ ?= $(BSP_UART_CLOCK_HZ)
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include ../common/app.mk
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CFLAGS += -DBSP_MAX2771_INPUT_CLOCK_HZ=$(BSP_MAX2771_INPUT_CLOCK_HZ)UL
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