191 lines
6.6 KiB
C++
191 lines
6.6 KiB
C++
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|* *|
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|* Enum Utility Definitions *|
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|* *|
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|* Automatically generated file, do not edit! *|
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|* From: ParallelLoopMapperAttr.td *|
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|* *|
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\*===----------------------------------------------------------------------===*/
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namespace mlir::gpu {
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::llvm::StringRef stringifyAddressSpace(AddressSpace val) {
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switch (val) {
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case AddressSpace::Global: return "global";
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case AddressSpace::Workgroup: return "workgroup";
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case AddressSpace::Private: return "private";
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case AddressSpace::Constant: return "constant";
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}
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return "";
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}
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::std::optional<AddressSpace> symbolizeAddressSpace(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<AddressSpace>>(str)
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.Case("global", AddressSpace::Global)
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.Case("workgroup", AddressSpace::Workgroup)
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.Case("private", AddressSpace::Private)
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.Case("constant", AddressSpace::Constant)
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.Default(::std::nullopt);
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}
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::std::optional<AddressSpace> symbolizeAddressSpace(uint32_t value) {
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switch (value) {
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case 1: return AddressSpace::Global;
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case 2: return AddressSpace::Workgroup;
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case 3: return AddressSpace::Private;
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case 4: return AddressSpace::Constant;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::gpu
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namespace mlir::gpu {
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::llvm::StringRef stringifyBarrierScope(BarrierScope val) {
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switch (val) {
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case BarrierScope::Subgroup: return "subgroup";
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case BarrierScope::Workgroup: return "workgroup";
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case BarrierScope::Cluster: return "cluster";
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}
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return "";
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}
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::std::optional<BarrierScope> symbolizeBarrierScope(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<BarrierScope>>(str)
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.Case("subgroup", BarrierScope::Subgroup)
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.Case("workgroup", BarrierScope::Workgroup)
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.Case("cluster", BarrierScope::Cluster)
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.Default(::std::nullopt);
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}
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::std::optional<BarrierScope> symbolizeBarrierScope(uint32_t value) {
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switch (value) {
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case 1: return BarrierScope::Subgroup;
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case 2: return BarrierScope::Workgroup;
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case 3: return BarrierScope::Cluster;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::gpu
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namespace mlir::gpu {
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::llvm::StringRef stringifyDimension(Dimension val) {
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switch (val) {
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case Dimension::x: return "x";
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case Dimension::y: return "y";
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case Dimension::z: return "z";
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}
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return "";
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}
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::std::optional<Dimension> symbolizeDimension(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<Dimension>>(str)
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.Case("x", Dimension::x)
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.Case("y", Dimension::y)
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.Case("z", Dimension::z)
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.Default(::std::nullopt);
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}
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::std::optional<Dimension> symbolizeDimension(uint32_t value) {
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switch (value) {
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case 0: return Dimension::x;
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case 1: return Dimension::y;
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case 2: return Dimension::z;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::gpu
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namespace mlir::gpu {
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::llvm::StringRef stringifyDimensionKind(DimensionKind val) {
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switch (val) {
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case DimensionKind::Other: return "other";
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case DimensionKind::Block: return "block";
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case DimensionKind::Grid: return "grid";
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case DimensionKind::Cluster: return "cluster";
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}
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return "";
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}
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::std::optional<DimensionKind> symbolizeDimensionKind(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<DimensionKind>>(str)
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.Case("other", DimensionKind::Other)
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.Case("block", DimensionKind::Block)
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.Case("grid", DimensionKind::Grid)
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.Case("cluster", DimensionKind::Cluster)
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.Default(::std::nullopt);
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}
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::std::optional<DimensionKind> symbolizeDimensionKind(uint32_t value) {
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switch (value) {
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case 0: return DimensionKind::Other;
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case 1: return DimensionKind::Block;
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case 2: return DimensionKind::Grid;
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case 3: return DimensionKind::Cluster;
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default: return ::std::nullopt;
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}
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}
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} // namespace mlir::gpu
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namespace mlir::gpu {
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::llvm::StringRef stringifyProcessor(Processor val) {
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switch (val) {
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case Processor::BlockX: return "block_x";
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case Processor::BlockY: return "block_y";
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case Processor::BlockZ: return "block_z";
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case Processor::ThreadX: return "thread_x";
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case Processor::ThreadY: return "thread_y";
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case Processor::ThreadZ: return "thread_z";
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case Processor::Sequential: return "sequential";
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}
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return "";
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}
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::std::optional<Processor> symbolizeProcessor(::llvm::StringRef str) {
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return ::llvm::StringSwitch<::std::optional<Processor>>(str)
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.Case("block_x", Processor::BlockX)
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.Case("block_y", Processor::BlockY)
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.Case("block_z", Processor::BlockZ)
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.Case("thread_x", Processor::ThreadX)
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.Case("thread_y", Processor::ThreadY)
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.Case("thread_z", Processor::ThreadZ)
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.Case("sequential", Processor::Sequential)
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.Default(::std::nullopt);
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}
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::std::optional<Processor> symbolizeProcessor(uint64_t value) {
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switch (value) {
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case 0: return Processor::BlockX;
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case 1: return Processor::BlockY;
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case 2: return Processor::BlockZ;
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case 3: return Processor::ThreadX;
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case 4: return Processor::ThreadY;
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case 5: return Processor::ThreadZ;
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case 6: return Processor::Sequential;
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default: return ::std::nullopt;
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}
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}
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bool ProcessorAttr::classof(::mlir::Attribute attr) {
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return (((::llvm::isa<::mlir::IntegerAttr>(attr))) && ((::llvm::cast<::mlir::IntegerAttr>(attr).getType().isSignlessInteger(64)))) && (((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 0)))) || ((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 1)))) || ((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 2)))) || ((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 3)))) || ((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 4)))) || ((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 5)))) || ((
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::llvm::cast<::mlir::IntegerAttr>(attr).getValue().eq(::llvm::APInt(64, 6)))));
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}
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ProcessorAttr ProcessorAttr::get(::mlir::MLIRContext *context, Processor val) {
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::mlir::IntegerType intType = ::mlir::IntegerType::get(context, 64);
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::mlir::IntegerAttr baseAttr = ::mlir::IntegerAttr::get(intType, static_cast<uint64_t>(val));
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return ::llvm::cast<ProcessorAttr>(baseAttr);
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}
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Processor ProcessorAttr::getValue() const {
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return static_cast<Processor>(::mlir::IntegerAttr::getValue().getZExtValue());
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}
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} // namespace mlir::gpu
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