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Complete the routing: 0 DRC violations, 0 unconnected

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The board now routes end to end. Every net carrying two or more pads is a
single connected copper group (216 nets, 1175 pads); kicad-cli reports 0 DRC
violations and 0 unconnected items with zones refilled.

Freerouting was never the blocker. The 14 remaining opens were three separate
defects:

1. Obstacles in route_local_power.py modelled every pad as its axis-aligned
   bounding box. A 0.8-mm BGA dogbone site sits diagonally between four lands:
   true clearance 0.1407 mm, but the box test measured 0.4 mm from the box edge
   and rejected it, so no via could be placed anywhere in the Ti375 escape
   field. Replaced with an exact rounded-rectangle model, validated against
   KiCad's own SHAPE::Collide to 0.00 um over 14850 samples. Same 0 DRC and one
   fewer unconnected at the route_local_power stage.

2. CLOCK's 0.15-mm clearance cannot physically escape the BGA: two adjacent
   0.45-mm dogbone vias on 0.8-mm pitch leave a 0.35-mm channel and a 0.10-mm
   trace needs 0.40 mm. HARD_TCK and MAX_SCLK could never leave the package.
   New rule "Ti375 escape field copper clearance" relaxes clearance to the
   0.10 mm this field already uses, only where both objects are inside U1's
   courtyard. The clock trunk keeps 0.15 mm outside it.

3. RF_NO_DIGITAL was a rectangle reaching 7 mm past the RF line, covering the
   MAX2771's whole digital pin field and forcing every U21 output onto F.Cu
   alone. Narrowed to the corridor generate_pcb.py already reserves as
   TEMP_RF_LINE (y <= 43.7), clearing RF copper by 1.1 mm. The RF return path
   is guaranteed by the unrouted L2/L7 ground planes, not by this area.

scripts/close_remaining.py replaces the ad-hoc residual scripts: a multi-layer
maze over (x, y, layer) at 0.1 mm on all five routable layers, seeded from all
copper of both groups, exact clearances, 0.10-mm necking inside the escape
field, and reversible rip-up that rolls back entirely if a displaced net cannot
be put back. ~150 s for the whole board.

Also removes the regenerable intermediate boards, one-off session logs and the
superseded residual scripts, and tracks board_routed.* as the deliverable.

The 402 schematic-parity warnings are pre-existing and unchanged: 199
auto-named unconnected pins, 199 footprint library-nickname mismatches, and 4
mounting holes with no symbol. None affects connectivity or fabrication.

Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
Claude-Session: https://claude.ai/code/session_012KaTmCCxCEW4awsmXRNT1d
This commit is contained in:
onur
2026-09-01 11:58:41 +03:00
parent af7c43b2a8
commit 95609a6b6a
33 changed files with 212217 additions and 66530 deletions
Download Patch File Download Diff File Expand all files Collapse all files
outputs/bom.csv
+6 -4
View File
@@ -1,5 +1,5 @@
Reference,Qty,Value,Manufacturer,MPN,Footprint,Assembly,DNP,Description
C1,1,100nF,Murata,GRM155R71A104KA01D,Capacitor_SMD:C_0402_1005Metric,SMT,no,TUSB320 local bypass
"C1,C129",2,100nF,Murata,GRM155R71A104KA01D,Capacitor_SMD:C_0402_1005Metric,SMT,no,TUSB320 local bypass
"C10,C11",2,47uF,Murata,GRM32ER70J476ME19L,Capacitor_SMD:C_1210_3225Metric,SMT,no,5-V system bulk
C100,1,100nF,Murata,GRM155R71A104KA01D,Capacitor_SMD:C_0402_1005Metric,SMT,no,16.368-MHz TCXO bypass
C101,1,1uF,Murata,GRM155R60J105KE19D,Capacitor_SMD:C_0402_1005Metric,SMT,no,Clock-rail local bulk
@@ -80,11 +80,12 @@ FB1,1,600R@100MHz,Murata,BLM15AG601SN1D,Inductor_SMD:L_0402_1005Metric,SMT,no,IM
FB2,1,600R@100MHz,Murata,BLM15AG601SN1D,Inductor_SMD:L_0402_1005Metric,SMT,no,FTDI USB-PHY supply ferrite
FB3,1,600R@100MHz,Murata,BLM15AG601SN1D,Inductor_SMD:L_0402_1005Metric,SMT,no,FTDI PLL supply ferrite
FL1,1,GPS L1/L1C SAW,Kyocera,SF14-1582M5UUS2,board:Kyocera_SF14_5pad,SMT,no,"1565.19-1585.65-MHz SAW, 1.2-dB typical insertion loss"
J1,1,USB-C USB2 sink,GCT,USB4105-GF-A-120,Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,SMT,no,"USB 2.0 Type-C receptacle, UFP/sink"
J1,1,USB-C USB2 sink,GCT,USB4105-GF-A-120,Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,SMT,no,"USB 2.0 Type-C receptacle, UFP/sink, debug data only"
J2,1,GPS L1 SMA,Amphenol RF,132289,Connector_Coaxial:SMA_Amphenol_132289_EdgeMount,THT,no,Edge-launch 50-ohm active GNSS antenna input
J3,1,EXT_5V,Phoenix Contact,1935161,"TerminalBlock_Phoenix:TerminalBlock_Phoenix_MKDS-1,5-2_1x02_P5.00mm_Horizontal",THT,no,Clearly labelled external regulated 5-V input
J4,1,EXT RESET_N,JST,SM02B-SRSS-TB(LF)(SN),Connector_JST:JST_SH_SM02B-SRSS-TB_1x02-1MP_P1.00mm_Horizontal,SMT,no,External active-low open-drain reset input; JST-SH 1.0-mm
J5,1,ANT BIAS OFF/3V3/5V,Wuerth Elektronik,61300311121,Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical,THT,no,One-shunt hardware antenna bias selection; no shunt is OFF
J7,1,USB-C power input,GCT,USB4105-GF-A-120,Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal,SMT,no,"USB 2.0 Type-C receptacle, UFP/sink, power input only"
"JPMOD1,JPMOD2",2,PMOD 3.3 V,Amphenol ICC,67997-412HLF,board:Digilent_PMOD_2x6_P2.54mm,THT,no,"Digilent 2x6 PMOD: eight 3.3 V GPIO, two GND, two 3.3 V"
"JPMOD3,JPMOD4",2,PMOD 1.8 V,Amphenol ICC,67997-412HLF,board:Digilent_PMOD_2x6_P2.54mm,THT,no,"Digilent 2x6 PMOD: eight 1.8 V GPIO, two GND, two 1.8 V"
L1,1,100nH,Coilcraft,XEL4030-101MEC,board:Coilcraft_XEL4030,SMT,no,"Core inductor: 30-A saturation, 1.5-mohm DCR"
@@ -134,7 +135,7 @@ R44,1,33R,Yageo,RC0402FR-0733RL,Resistor_SMD:R_0402_1005Metric,SMT,no,40-MHz ADC
R55,1,100K,Yageo,RC0402FR-07100KL,Resistor_SMD:R_0402_1005Metric,SMT,no,MAX2771 remains shut down before FPGA configuration
R56,1,33R,Yageo,RC0402FR-0733RL,Resistor_SMD:R_0402_1005Metric,SMT,no,40-MHz FPGA-clock source termination
"R57,R58,R59",3,22R,Yageo,RC0402FR-0722RL,Resistor_SMD:R_0402_1005Metric,SMT,no,SafeSPI source-series damping
R6,1,900K,Yageo,RC0402FR-07909KL,Resistor_SMD:R_0402_1005Metric,SMT,no,TUSB320 VBUS_DET current limiter
"R6,R107",2,900K,Yageo,RC0402FR-07909KL,Resistor_SMD:R_0402_1005Metric,SMT,no,TUSB320 VBUS_DET current limiter
R60,1,22R,Yageo,RC0402FR-0722RL,Resistor_SMD:R_0402_1005Metric,SMT,no,SafeSPI MISO source damping at IMU
R61,1,10K,Yageo,RC0402FR-0710KL,Resistor_SMD:R_0402_1005Metric,SMT,no,Hold IMU reset until FPGA releases it
R62,1,27R,Yageo,RC0402FR-0727RL,Resistor_SMD:R_0402_1005Metric,SMT,no,FTDI USB D+ series termination
@@ -204,7 +205,8 @@ U31,1,SN74LVC1G07,Texas Instruments,SN74LVC1G07DBVR,Package_TO_SOT_SMD:SOT-23-5,
U32,1,SN74LVC1G07,Texas Instruments,SN74LVC1G07DBVR,Package_TO_SOT_SMD:SOT-23-5,SMT,no,Open-drain all-rail-valid translation into FPGA CRESET_N
U33,1,SN74LVC1G07,Texas Instruments,SN74LVC1G07DBVR,Package_TO_SOT_SMD:SOT-23-5,SMT,no,Open-drain external/manual reset isolation into FPGA CRESET_N
U34,1,SN74LVC08A,Texas Instruments,SN74LVC08APWR,Package_SO:TSSOP-14_4.4x5mm_P0.65mm,SMT,no,Always-on all-rail power-valid logic for reset release and debug isolation
U5,1,TUSB320LAI,Texas Instruments,TUSB320LAIRSW(R),Package_DFN_QFN:Texas_X2QFN-12_1.6x1.6mm_P0.4mm,SMT,no,USB Type-C port controller in UFP GPIO mode; integrated Rd on CC1/CC2
U35,1,TUSB320LAI,Texas Instruments,TUSB320LAIRSW(R),Package_DFN_QFN:Texas_X2QFN-12_1.6x1.6mm_P0.4mm,SMT,no,USB Type-C port controller in UFP GPIO mode for the power input; integrated Rd on CC1/CC2; OUT1/OUT2 3-A advertisement drives U10/U11 MAIN_EN gating
U5,1,TUSB320LAI,Texas Instruments,TUSB320LAIRSW(R),Package_DFN_QFN:Texas_X2QFN-12_1.6x1.6mm_P0.4mm,SMT,no,USB Type-C port controller in UFP GPIO mode; integrated Rd on CC1/CC2; current-advertisement outputs unused since this port never sources SYS5
U6,1,TPD2EUSB30A,Texas Instruments,TPD2EUSB30ADRTR,Package_TO_SOT_SMD:Texas_DRT-3,SMT,no,Low-capacitance USB 2.0 ESD protection
"U7,U8",2,TPS259470A,Texas Instruments,TPS259470ARPWR,board:Texas_RPW0010A_QFN10,SMT,no,True-reverse-blocking eFuse; UV/OV/current/inrush protection
U9,1,TPS2121,Texas Instruments,TPS2121RUXR,board:Texas_RUX0012A_VQFN12,SMT,no,4.5-A power mux; external input wins near-equal valid 5-V inputs
1 Reference Qty Value Manufacturer MPN Footprint Assembly DNP Description
2 C1 C1,C129 1 2 100nF Murata GRM155R71A104KA01D Capacitor_SMD:C_0402_1005Metric SMT no TUSB320 local bypass
3 C10,C11 2 47uF Murata GRM32ER70J476ME19L Capacitor_SMD:C_1210_3225Metric SMT no 5-V system bulk
4 C100 1 100nF Murata GRM155R71A104KA01D Capacitor_SMD:C_0402_1005Metric SMT no 16.368-MHz TCXO bypass
5 C101 1 1uF Murata GRM155R60J105KE19D Capacitor_SMD:C_0402_1005Metric SMT no Clock-rail local bulk
80 FB2 1 600R@100MHz Murata BLM15AG601SN1D Inductor_SMD:L_0402_1005Metric SMT no FTDI USB-PHY supply ferrite
81 FB3 1 600R@100MHz Murata BLM15AG601SN1D Inductor_SMD:L_0402_1005Metric SMT no FTDI PLL supply ferrite
82 FL1 1 GPS L1/L1C SAW Kyocera SF14-1582M5UUS2 board:Kyocera_SF14_5pad SMT no 1565.19-1585.65-MHz SAW, 1.2-dB typical insertion loss
83 J1 1 USB-C USB2 sink GCT USB4105-GF-A-120 Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal SMT no USB 2.0 Type-C receptacle, UFP/sink USB 2.0 Type-C receptacle, UFP/sink, debug data only
84 J2 1 GPS L1 SMA Amphenol RF 132289 Connector_Coaxial:SMA_Amphenol_132289_EdgeMount THT no Edge-launch 50-ohm active GNSS antenna input
85 J3 1 EXT_5V Phoenix Contact 1935161 TerminalBlock_Phoenix:TerminalBlock_Phoenix_MKDS-1,5-2_1x02_P5.00mm_Horizontal THT no Clearly labelled external regulated 5-V input
86 J4 1 EXT RESET_N JST SM02B-SRSS-TB(LF)(SN) Connector_JST:JST_SH_SM02B-SRSS-TB_1x02-1MP_P1.00mm_Horizontal SMT no External active-low open-drain reset input; JST-SH 1.0-mm
87 J5 1 ANT BIAS OFF/3V3/5V Wuerth Elektronik 61300311121 Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical THT no One-shunt hardware antenna bias selection; no shunt is OFF
88 J7 1 USB-C power input GCT USB4105-GF-A-120 Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal SMT no USB 2.0 Type-C receptacle, UFP/sink, power input only
89 JPMOD1,JPMOD2 2 PMOD 3.3 V Amphenol ICC 67997-412HLF board:Digilent_PMOD_2x6_P2.54mm THT no Digilent 2x6 PMOD: eight 3.3 V GPIO, two GND, two 3.3 V
90 JPMOD3,JPMOD4 2 PMOD 1.8 V Amphenol ICC 67997-412HLF board:Digilent_PMOD_2x6_P2.54mm THT no Digilent 2x6 PMOD: eight 1.8 V GPIO, two GND, two 1.8 V
91 L1 1 100nH Coilcraft XEL4030-101MEC board:Coilcraft_XEL4030 SMT no Core inductor: 30-A saturation, 1.5-mohm DCR
135 R55 1 100K Yageo RC0402FR-07100KL Resistor_SMD:R_0402_1005Metric SMT no MAX2771 remains shut down before FPGA configuration
136 R56 1 33R Yageo RC0402FR-0733RL Resistor_SMD:R_0402_1005Metric SMT no 40-MHz FPGA-clock source termination
137 R57,R58,R59 3 22R Yageo RC0402FR-0722RL Resistor_SMD:R_0402_1005Metric SMT no SafeSPI source-series damping
138 R6 R6,R107 1 2 900K Yageo RC0402FR-07909KL Resistor_SMD:R_0402_1005Metric SMT no TUSB320 VBUS_DET current limiter
139 R60 1 22R Yageo RC0402FR-0722RL Resistor_SMD:R_0402_1005Metric SMT no SafeSPI MISO source damping at IMU
140 R61 1 10K Yageo RC0402FR-0710KL Resistor_SMD:R_0402_1005Metric SMT no Hold IMU reset until FPGA releases it
141 R62 1 27R Yageo RC0402FR-0727RL Resistor_SMD:R_0402_1005Metric SMT no FTDI USB D+ series termination
205 U32 1 SN74LVC1G07 Texas Instruments SN74LVC1G07DBVR Package_TO_SOT_SMD:SOT-23-5 SMT no Open-drain all-rail-valid translation into FPGA CRESET_N
206 U33 1 SN74LVC1G07 Texas Instruments SN74LVC1G07DBVR Package_TO_SOT_SMD:SOT-23-5 SMT no Open-drain external/manual reset isolation into FPGA CRESET_N
207 U34 1 SN74LVC08A Texas Instruments SN74LVC08APWR Package_SO:TSSOP-14_4.4x5mm_P0.65mm SMT no Always-on all-rail power-valid logic for reset release and debug isolation
208 U5 U35 1 TUSB320LAI Texas Instruments TUSB320LAIRSW(R) Package_DFN_QFN:Texas_X2QFN-12_1.6x1.6mm_P0.4mm SMT no USB Type-C port controller in UFP GPIO mode; integrated Rd on CC1/CC2 USB Type-C port controller in UFP GPIO mode for the power input; integrated Rd on CC1/CC2; OUT1/OUT2 3-A advertisement drives U10/U11 MAIN_EN gating
209 U5 1 TUSB320LAI Texas Instruments TUSB320LAIRSW(R) Package_DFN_QFN:Texas_X2QFN-12_1.6x1.6mm_P0.4mm SMT no USB Type-C port controller in UFP GPIO mode; integrated Rd on CC1/CC2; current-advertisement outputs unused since this port never sources SYS5
210 U6 1 TPD2EUSB30A Texas Instruments TPD2EUSB30ADRTR Package_TO_SOT_SMD:Texas_DRT-3 SMT no Low-capacitance USB 2.0 ESD protection
211 U7,U8 2 TPS259470A Texas Instruments TPS259470ARPWR board:Texas_RPW0010A_QFN10 SMT no True-reverse-blocking eFuse; UV/OV/current/inrush protection
212 U9 1 TPS2121 Texas Instruments TPS2121RUXR board:Texas_RUX0012A_VQFN12 SMT no 4.5-A power mux; external input wins near-equal valid 5-V inputs