onur
124 lines
5.4 KiB
Systemverilog
124 lines
5.4 KiB
Systemverilog
// Generated by CIRCT firtool-1.151.0
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module HellaCacheArbiter(
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input clock,
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output io_requestor_0_req_ready,
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input io_requestor_0_req_valid,
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input [33:0] io_requestor_0_req_bits_addr,
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input [6:0] io_requestor_0_req_bits_tag,
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input [4:0] io_requestor_0_req_bits_cmd,
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input [1:0] io_requestor_0_req_bits_size,
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input io_requestor_0_req_bits_signed,
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io_requestor_0_s1_kill,
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input [63:0] io_requestor_0_s1_data_data,
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output io_requestor_0_s2_nack,
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io_requestor_0_resp_valid,
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output [6:0] io_requestor_0_resp_bits_tag,
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output [1:0] io_requestor_0_resp_bits_size,
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output [63:0] io_requestor_0_resp_bits_data,
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output io_requestor_0_resp_bits_replay,
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io_requestor_0_resp_bits_has_data,
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output [63:0] io_requestor_0_resp_bits_data_word_bypass,
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output io_requestor_0_replay_next,
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io_requestor_0_s2_xcpt_ma_ld,
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io_requestor_0_s2_xcpt_ma_st,
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io_requestor_0_s2_xcpt_pf_ld,
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io_requestor_0_s2_xcpt_pf_st,
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io_requestor_0_s2_xcpt_ae_ld,
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io_requestor_0_s2_xcpt_ae_st,
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io_requestor_0_ordered,
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io_requestor_0_perf_grant,
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io_requestor_1_req_ready,
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input io_requestor_1_req_valid,
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input [33:0] io_requestor_1_req_bits_addr,
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input [4:0] io_requestor_1_req_bits_cmd,
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input [1:0] io_requestor_1_req_bits_size,
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input io_requestor_1_s1_kill,
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input [63:0] io_requestor_1_s1_data_data,
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input [7:0] io_requestor_1_s1_data_mask,
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output io_requestor_1_s2_nack,
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io_requestor_1_resp_valid,
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output [63:0] io_requestor_1_resp_bits_data_raw,
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input io_mem_req_ready,
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output io_mem_req_valid,
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output [33:0] io_mem_req_bits_addr,
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output [6:0] io_mem_req_bits_tag,
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output [4:0] io_mem_req_bits_cmd,
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output [1:0] io_mem_req_bits_size,
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output io_mem_req_bits_signed,
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output [1:0] io_mem_req_bits_dprv,
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output io_mem_req_bits_no_xcpt,
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io_mem_s1_kill,
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output [63:0] io_mem_s1_data_data,
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output [7:0] io_mem_s1_data_mask,
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input io_mem_s2_nack,
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io_mem_resp_valid,
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input [6:0] io_mem_resp_bits_tag,
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input [1:0] io_mem_resp_bits_size,
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input [63:0] io_mem_resp_bits_data,
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input io_mem_resp_bits_replay,
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io_mem_resp_bits_has_data,
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input [63:0] io_mem_resp_bits_data_word_bypass,
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io_mem_resp_bits_data_raw,
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input io_mem_replay_next,
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io_mem_s2_xcpt_ma_ld,
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io_mem_s2_xcpt_ma_st,
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io_mem_s2_xcpt_pf_ld,
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io_mem_s2_xcpt_pf_st,
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io_mem_s2_xcpt_ae_ld,
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io_mem_s2_xcpt_ae_st,
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io_mem_ordered,
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io_mem_perf_grant
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);
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reg s1_id;
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reg s2_id;
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always @(posedge clock) begin
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s1_id <= ~io_requestor_0_req_valid;
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s2_id <= s1_id;
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end // always @(posedge)
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assign io_requestor_0_req_ready = io_mem_req_ready;
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assign io_requestor_0_s2_nack = io_mem_s2_nack & ~s2_id;
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assign io_requestor_0_resp_valid = io_mem_resp_valid & ~(io_mem_resp_bits_tag[0]);
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assign io_requestor_0_resp_bits_tag = {1'h0, io_mem_resp_bits_tag[6:1]};
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assign io_requestor_0_resp_bits_size = io_mem_resp_bits_size;
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assign io_requestor_0_resp_bits_data = io_mem_resp_bits_data;
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assign io_requestor_0_resp_bits_replay = io_mem_resp_bits_replay;
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assign io_requestor_0_resp_bits_has_data = io_mem_resp_bits_has_data;
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assign io_requestor_0_resp_bits_data_word_bypass = io_mem_resp_bits_data_word_bypass;
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assign io_requestor_0_replay_next = io_mem_replay_next;
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assign io_requestor_0_s2_xcpt_ma_ld = io_mem_s2_xcpt_ma_ld;
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assign io_requestor_0_s2_xcpt_ma_st = io_mem_s2_xcpt_ma_st;
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assign io_requestor_0_s2_xcpt_pf_ld = io_mem_s2_xcpt_pf_ld;
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assign io_requestor_0_s2_xcpt_pf_st = io_mem_s2_xcpt_pf_st;
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assign io_requestor_0_s2_xcpt_ae_ld = io_mem_s2_xcpt_ae_ld;
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assign io_requestor_0_s2_xcpt_ae_st = io_mem_s2_xcpt_ae_st;
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assign io_requestor_0_ordered = io_mem_ordered;
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assign io_requestor_0_perf_grant = io_mem_perf_grant;
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assign io_requestor_1_req_ready = io_mem_req_ready & ~io_requestor_0_req_valid;
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assign io_requestor_1_s2_nack = io_mem_s2_nack & s2_id;
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assign io_requestor_1_resp_valid = io_mem_resp_valid & io_mem_resp_bits_tag[0];
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assign io_requestor_1_resp_bits_data_raw = io_mem_resp_bits_data_raw;
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assign io_mem_req_valid = io_requestor_0_req_valid | io_requestor_1_req_valid;
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assign io_mem_req_bits_addr =
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io_requestor_0_req_valid
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? io_requestor_0_req_bits_addr
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: io_requestor_1_req_bits_addr;
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assign io_mem_req_bits_tag =
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io_requestor_0_req_valid ? {io_requestor_0_req_bits_tag[5:0], 1'h0} : 7'h1;
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assign io_mem_req_bits_cmd =
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io_requestor_0_req_valid ? io_requestor_0_req_bits_cmd : io_requestor_1_req_bits_cmd;
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assign io_mem_req_bits_size =
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io_requestor_0_req_valid
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? io_requestor_0_req_bits_size
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: io_requestor_1_req_bits_size;
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assign io_mem_req_bits_signed =
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io_requestor_0_req_valid & io_requestor_0_req_bits_signed;
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assign io_mem_req_bits_dprv = {2{io_requestor_0_req_valid}};
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assign io_mem_req_bits_no_xcpt = ~io_requestor_0_req_valid;
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assign io_mem_s1_kill = s1_id ? io_requestor_1_s1_kill : io_requestor_0_s1_kill;
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assign io_mem_s1_data_data =
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s1_id ? io_requestor_1_s1_data_data : io_requestor_0_s1_data_data;
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assign io_mem_s1_data_mask = s1_id ? io_requestor_1_s1_data_mask : 8'h0;
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endmodule
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