49 lines
1.6 KiB
Markdown
49 lines
1.6 KiB
Markdown
# MAX2771 SPI Register Test
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This bare-metal application exercises the dedicated MAX2771 three-wire SPI IP
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at `0x10016000`. It does not use or alter the generic PMOD SPI peripheral.
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The test uses the complete default register table from the
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[MAX2771 data sheet](https://www.analog.com/media/en/technical-documentation/data-sheets/max2771.pdf).
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It writes registers `0x0` through `0xA`, reads each register back immediately,
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then performs a second full read sweep and prints all values. Registers `0x0`
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and `0x9` therefore receive the mandatory reserved-bit values required after
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every MAX2771 power cycle.
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Build directly:
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```bash
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make -C soc/software max2771-spi-test
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```
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Build through a board flow:
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```bash
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make -C targets/fpga/genesys2 software APP=max2771_spi_test
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make -C targets/fpga/vcu118 software APP=max2771_spi_test
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```
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For a fast RAM-loaded Genesys 2 test:
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```bash
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make -C targets/fpga/genesys2 debug-load APP=max2771_spi_test
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make -C targets/fpga/genesys2 uart-listen
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```
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Expected final output is:
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```text
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PASS,MAX2771 defaults programmed and verified
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```
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## EV Kit Connection
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The EV kit already has a MAX32625 PICO MCU connected to `SPI_CLK`, `SPI_CSN`,
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and `SPI_DATA`. Before connecting the FPGA, disconnect that controller or put
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all three MCU pins in high impedance and do not run the EV kit GUI. Two active
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masters on `SPI_DATA` can cause electrical contention.
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Connect `SCLK`, `CSN`, the single bidirectional `SDATA`, and a common ground.
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Power the EV kit according to its own guide. Do not connect the FPGA board's
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PMOD power pin to an independently powered EV kit.
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